CAT5411YI-10-T1 datasheet, PDF

Datasheet> All Categories > Analog mixed-signal IC> converter> CAT5411YI-10-T1

CAT5411YI-10-T1: DescriptionDual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface; CategoryAnalog mixed-signal IC converter; File Size272KB，16 Pages; ManufacturerCatalyst; Websitehttp://www.catalyst-semiconductor.com/; Environmental Compliance

Download Datasheet Parametric Compare View All

CAT5411YI-10-T1 Overview

Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface

CAT5411YI-10-T1 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Catalyst
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP24,.25
Contacts	24
Reach Compliance Code	unknow
ECCN code	EAR99
Other features	NONVOLATILE MEMORY
control interface	3-WIRE SERIAL
Converter type	DIGITAL POTENTIOMETER
JESD-30 code	R-PDSO-G24
JESD-609 code	e3
length	7.8 mm
Humidity sensitivity level	1
Number of functions	2
Number of positions	64
Number of terminals	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP24,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3/5 V
Certification status	Not Qualified
resistance law	LINEAR
Maximum resistor tolerance	20%
Maximum resistor terminal voltage	3 V
Minimum resistor terminal voltage
Maximum seat height	1.1 mm
Nominal supply voltage	3 V
surface mount	YES
Nominal temperature coefficient	300 ppm/°C
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
Nominal total resistance	10000 Ω
width	4.4 mm

CAT5411YI-10-T1 Related Products

	CAT5411YI-10-T1	CAT5411_07	CAT5411YI-50-T1	CAT5411YI-25-T1	CAT5411WI-25-T1	CAT5411YI-00-T1	CAT5411WI-50-T1	CAT5411WI-10-T1	CAT5411WI-00-T1
Description	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface	Dual Digitally Programmable Potentiometers (DPP TM) with 64 Taps and SPI Interface
Is it Rohs certified?	conform to	-	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Maker	Catalyst	-	Catalyst	Catalyst	Catalyst	Catalyst	Catalyst	Catalyst	Catalyst
Parts packaging code	TSSOP	-	TSSOP	TSSOP	SOIC	TSSOP	SOIC	SOIC	SOIC
package instruction	TSSOP, TSSOP24,.25	-	TSSOP, TSSOP24,.25	TSSOP, TSSOP24,.25	SOP, SOP24,.4	TSSOP, TSSOP24,.25	SOP, SOP24,.4	SOP, SOP24,.4	SOP, SOP24,.4
Contacts	24	-	24	24	24	24	24	24	24
Reach Compliance Code	unknow	-	unknow	unknow	unknow	unknow	unknow	unknow	unknow
ECCN code	EAR99	-	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Other features	NONVOLATILE MEMORY	-	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY
control interface	3-WIRE SERIAL	-	3-WIRE SERIAL	3-WIRE SERIAL	3-WIRE SERIAL	3-WIRE SERIAL	3-WIRE SERIAL	3-WIRE SERIAL	3-WIRE SERIAL
Converter type	DIGITAL POTENTIOMETER	-	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER
JESD-30 code	R-PDSO-G24	-	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24
JESD-609 code	e3	-	e3	e3	e3	e3	e3	e3	e3
length	7.8 mm	-	7.8 mm	7.8 mm	15.3 mm	7.8 mm	15.3 mm	15.3 mm	15.3 mm
Humidity sensitivity level	1	-	1	1	1	1	1	1	1
Number of functions	2	-	2	2	2	2	2	2	2
Number of positions	64	-	64	64	64	64	64	64	64
Number of terminals	24	-	24	24	24	24	24	24	24
Maximum operating temperature	85 °C	-	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	-	TSSOP	TSSOP	SOP	TSSOP	SOP	SOP	SOP
Encapsulate equivalent code	TSSOP24,.25	-	TSSOP24,.25	TSSOP24,.25	SOP24,.4	TSSOP24,.25	SOP24,.4	SOP24,.4	SOP24,.4
Package shape	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	-	260	260	260	260	260	260	260
power supply	3/5 V	-	3/5 V	3/5 V	3/5 V	3/5 V	3/5 V	3/5 V	3/5 V
Certification status	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
resistance law	LINEAR	-	LINEAR	LINEAR	LINEAR	LINEAR	LINEAR	LINEAR	LINEAR
Maximum resistor tolerance	20%	-	20%	20%	20%	20%	20%	20%	20%
Maximum resistor terminal voltage	3 V	-	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Maximum seat height	1.1 mm	-	1.1 mm	1.1 mm	2.65 mm	1.1 mm	2.65 mm	2.65 mm	2.65 mm
Nominal supply voltage	3 V	-	3 V	3 V	3 V	3 V	3 V	3 V	3 V
surface mount	YES	-	YES	YES	YES	YES	YES	YES	YES
Nominal temperature coefficient	300 ppm/°C	-	300 ppm/°C	300 ppm/°C	300 ppm/°C	300 ppm/°C	300 ppm/°C	300 ppm/°C	300 ppm/°C
Temperature level	INDUSTRIAL	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	MATTE TIN	-	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN
Terminal form	GULL WING	-	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	-	0.65 mm	0.65 mm	1.27 mm	0.65 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	-	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	40	-	40	40	40	40	40	40	40
Nominal total resistance	10000 Ω	-	50000 Ω	2500 Ω	2500 Ω	100000 Ω	50000 Ω	10000 Ω	100000 Ω
width	4.4 mm	-	4.4 mm	4.4 mm	7.5 mm	4.4 mm	7.5 mm	7.5 mm	7.5 mm

Recommended Resources

Differential bridge amplifier circuit diagram

Microprocessor power supply circuit diagram using linear voltage regulator

Multistage DC coupled amplifier circuitb

Typical application circuit of Huanyu HTHY-21 motor protector

Multifunctional computing converter 4302

Single-phase motor connected in series with capacitor speed regulating two-speed circuit

2012 Competition Award-winning Papers, Source Code, PCB (Part 1): [i=s]This post was last edited by sigma on 2019-5-20 14:34[/i] [align=center][size=4][/size][/align] [size=4][size=4] [/size] This post collects some winning works of the 2012 competition, all of whic...; sigma Electronics Design Contest

2005 National Competition Module Board: 2005 National Competition Module Board...; feifei Embedded System

Performance indicators of power amplifiers: There are many performance indicators of power amplifiers, including output power, frequency response, distortion, signal-to-noise ratio, output impedance, damping coefficient, etc., among which outpu...; fish001 Analogue and Mixed Signal

TI Live: The latest reference solutions for video doorbells, network cameras, etc., and the core components for their implementation: Want to find the latest video doorbell and network camera solutions for reference? Or the prototype of the relevant solution has been finalized, what devices are suitable, cheap, easy to use, and what...; nmg TI Technology Forum

How to write a testbench for a subroutine in vivado: There are too many programs in a project, but I don't need so many of them. I just want to see the timing diagram of one of the subroutines, but I don't know how to write a testbench. Do I need to wri...; 刘123 FPGA/CPLD

Continuing Openmv4, filling the pits and digging the road one: starting from the source process: [font=宋体][size=4] Well, I finally squeezed out some time. I still owe the goddess and the captain a few posts. I thought, let's make this a serial post to talk about it. [/size][/font][font=宋体][size=4...; RCSN stm32/stm8

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components