that provides bidirectional buffering while maintain-
ing a low offset voltage and high noise margin up to
0.3 • V
CC
. The high noise margin allows the LTC4313 to be
interoperable with devices that drive a high V
OL
(>0.4V) and
allows multiple LTC4313s to be cascaded. The LTC4313-1
and LTC4313-2 support level translation between 3.3V and
5V busses. In addition to these voltages, the LTC4313-3
also supports level translation to 1.5V, 1.8V and 2.5V.
During insertion, the SDA and SCL lines are pre-charged to
1V to minimize bus disturbances. Connection is established
between the input and output after ENABLE is asserted
high and a stop bit or bus idle condition has been detected
on the SDA and SCL pins.
If both data and clock are not simultaneously high at least
once in 45ms, the input is disconnected from the output.
Up to 16 clock pulses are subsequently generated to free
the stuck bus. Rise time accelerators (RTAs) provide pull-up
currents on SDA and SCL rising edges to meet rise time
specifications in heavily loaded systems. The RTAs are
configured as slew limited switches in the LTC4313-1 and
2.5mA current sources in the LTC4313-2. The LTC4313-3
does not have RTAs.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6356140, 6650174,
7032051, 7478286.
n
n
n
n
n
n
n
n
Bidirectional Buffer Increases Fanout
High Noise Margin with V
IL
= 0.3•V
CC
Compatible with Non-Compliant I
2
C Devices That
Drive a High V
OL
Strong (LTC4313-1) and 2.5mA (LTC4313-2)
Rise Time Accelerator Current
Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses
Prevents SDA and SCL Corruption During Live Board
Insertion and Removal from Backplane
Stuck Bus Disconnect and Recovery
Compatible with I
2
C, I
2
C Fast Mode and SMBus
±4kV Human Body Model ESD Ruggedness
High Impedance SDA, SCL Pins When Unpowered
8-Lead MSOP and 8-Lead (3mm × 3mm) DFN
Packages
applicaTions
n
n
n
n
n
n
Capacitance Buffers/Bus Extender
Live Board Insertion
Telecommunications Systems Including ATCA
Level Translation
PMBus
Servers
Typical applicaTion
3.3V
5V
400kHz Operation
R
BUS_IN
= 2.7k , C
BUS_IN
= 50pF
R
BUS_OUT
= 1.3k , C
BUS_OUT
= 100pF
0.01µF
2.7k
2.7k
V
CC
ENABLE
LTC4313-1
READY
10k
1.3k
1.3k
SCLOUT
1V/DIV
SCLIN
READY
SCL2
SDA2
500ns/DIV
4313123 TA01b
SCL1
SDA1
SCLIN
SDAIN
GND
SCLOUT
SDAOUT
4313123 TA01a
4313123f
1
LTC4313-1/LTC4313-2/
LTC4313-3
absoluTe MaxiMuM raTings
(Notes 1, 2)
Supply Voltage V
CC
...................................... –0.3V to 6V
Input Voltage ENABLE .................................. –0.3V to 6V
Input/Output Voltages SDAIN, SDAOUT,
SCLIN, SCLOUT ........................................... –0.3V to 6V
Output Voltage READY ................................. –0.3V to 6V
Output Sink Current READY ...................................50mA
Operating Ambient Temperature Range
LTC4313C ................................................ 0°C to 70°C
LTC4313I.............................................. –40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS Package ...................................................... 300°C
pin conFiguraTion
TOP VIEW
ENABLE
SCLOUT
SCLIN
GND
1
2
3
4
9
8 V
CC
7 SDAOUT
6 SDAIN
5 READY
TOP VIEW
ENABLE
SCLOUT
SCLIN
GND
1
2
3
4
8
7
6
5
V
CC
SDAOUT
SDAIN
READY
DD8 PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JA
= 39.7°C/W
EXPOSED PAD (PIN 9) PCB CONNECTION TO GND IS OPTIONAL
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 163°C/W
orDer inForMaTion
LEAD FREE FINISH
LTC4313CDD-1#PBF
LTC4313IDD-1#PBF
LTC4313CMS8-1#PBF
LTC4313IMS8-1#PBF
LTC4313CDD-2#PBF
LTC4313IDD-2#PBF
LTC4313CMS8-2#PBF
LTC4313IMS8-2#PBF
LTC4313CDD-3#PBF
LTC4313IDD-3#PBF
LTC4313CMS8-3#PBF
LTC4313IMS8-3#PBF
TAPE AND REEL
LTC4313CDD-1#TRPBF
LTC4313IDD-1#TRPBF
LTC4313CMS8-1#TRPBF
LTC4313IMS8-1#TRPBF
LTC4313CDD-2#TRPBF
LTC4313IDD-2#TRPBF
LTC4313CMS8-2#TRPBF
LTC4313IMS8-2#TRPBF
LTC4313CDD-3#TRPBF
LTC4313IDD-3#TRPBF
LTC4313CMS8-3#TRPBF
LTC4313IMS8-3#TRPBF
PART MARKING*
LFYZ
LFYZ
LTFYZ
LTFYZ
LFZB
LFZB
LTFZC
LTFZC
LGDD
LGDD
LTGDF
LTGDF
PACKAGE DESCRIPTION
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead Plastic MSOP
8-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
4313123f
2
LTC4313-1/LTC4313-2/
LTC4313-3
elecTrical characTerisTics
SYMBOL
PARAMETER
Power Supply/Start-Up
V
CC
Input Supply Voltage
V
DD,BUS
2-Wire Bus Supply Voltage
I
CC
I
CC(DISABLED)
V
TH_UVLO
V
CC_UVLO(HYST)
V
PRE
Buffers
V
OS(SAT)
V
OS
Input Supply Current
Input Supply Current
V
CC
UVLO Threshold
UVLO Threshold Hysteresis Voltage
Precharge Voltage
Buffer Offset Voltage
Buffer Offset Voltage
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 3.3V unless otherwise noted.
CONDITIONS
l
MIN
2.9
2.9
1.4
6
2.5
2.55
0.8
100
15
50
15
0.3•V
CC
TYP
MAX
5.5
5.5
5.5
10
4.5
2.85
1.2
UNITS
V
V
V
mA
mA
V
mV
V
mV
mV
mV
mV
V
mV
µA
pF
V/µs
V
mV
mA
mA
V
µA
V
µA
ms
kHz
ns
ns
µs
LTC4313-1, LTC4313-2
LTC4313-3
V
ENABLE
= V
CC
= 5.5V, V
SDAIN,SCLIN
= 0V
(Note 3)
V
ENABLE
= 0V, V
CC
= 5.5V,
V
SDAIN,SCLIN
= 0V
V
CC
Rising
SDA, SCL Pins Open
I
OL
= 4mA, Driven V
SDA,SCL
= 50mV
I
OL
= 500µA, Driven V
SDA,SCL
= 50mV
I
OL
= 4mA, Driven V
SDA,SCL
= 200mV
I
OL
= 500µA, Driven V
SDA,SCL
= 200mV
V
CC
= 2.9V, 3.3V, 5.5V
SDA, SCL Pins = 5.5V, V
CC
= 5.5V, 0V
SDA, SCL Pins (Note 4)
SDA, SCL Pins, V
CC
= 5V
V
CC
= 5V
SDA, SCL Pins, V
CC
= 5V
SDA, SCL Pins, V
CC
= 5V (Note 5)
LTC4313-1
LTC4313-2
l
l
l
l
l
8.1
3.5
2.7
200
1
l
l
l
l
l
l
V
IL, FALLING
Buffer Input Logic Low Voltage
∆V
IL(HYST)
V
IL
Hysteresis Voltage
I
LEAK
Input Leakage Current
C
IN
Input Capacitance
Rise Time Accelerators (LTC4313-1 and LTC4313-2 Only)
dV/dt
(RTA)
Minimum Slew Rate Requirement
V
RTA(TH)
Rise Time Accelerator DC Threshold Voltage
∆V
ACC
Buffers Off to Accelerator On Voltage
I
RTA
Rise Time Accelerator Pull-Up Current
l
l
190
280
60
120
120
180
60
115
0.33•V
CC
0.36•V
CC
50
±10
10
l
l
l
l
l
0.1
0.2
0.4
0.38 •V
CC
0.41•V
CC
0.44•V
CC
0.05•V
CC
0.07•V
CC
15
1.5
1
25
2.5
1.4
0.1
0.1
35
400
130
20
250
300
95
175
45
40
3.5
1.8
±10
0.4
±5
55
Enable/Control
V
EN(TH)
ENABLE Threshold Voltage
I
LEAK
ENABLE Leakage Current
READY Output Low Voltage
V
READY(OL)
I
READY(OH)
READY Off Leakage Current
Stuck Low Timeout Circuitry
t
TIMEOUT
Bus Stuck Low Timer
2
C Interface Timing
I
f
SCL(MAX)
I
2
C Frequency Max
t
PDHL
SCL, SDA Fall Delay
t
f
t
IDLE
SCL, SDA Fall Times
Bus Idle Time
l
V
ENABLE
= 5.5V
I
READY
= 3mA, V
CC
= 5V
V
CC
= V
READY
= 5V
l
l
l
l
l
V
CC
= V
DD,BUS
= 5V, C
BUS
= 100pF
,
R
BUS
= 10kΩ (Note 4)
V
CC
= V
DD,BUS
= 5V, C
BUS
= 100pF
,
R
BUS
= 10kΩ (Note 4)
l
55
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive and all voltages are referenced to
GND unless otherwise indicated.
Note 3:
Test performed with SDA, SCL buffers active.
Note 4:
Guaranteed by design and not tested.
Note 5:
Measured in a special DC mode with V
SDA,SCL
= V
RTA(TH)
+ 1V.
The transient I
RTA
during rising edges for the LTC4313-1 will depend on
the bus loading condition and the slew rate of the bus. The LTC4313-1’s
internal slew rate control circuitry limits the maximum bus rise rate to
75V/µs by controlling the transient I
RTA
.
4313123f
3
LTC4313-1/LTC4313-2/
LTC4313-3
Typical perForMance characTerisTics
I
CC
Enabled Current
vs Supply Voltage
9.0
8.5
8.0
I
CC
(mA)
I
CC
(mA)
7.5
7.0
2.5
6.5
6.0
2.0
3.0
I
OL
(mA)
V
SDAIN,SCLIN
= 0V
V
ENABLE
= 5.5V
4.0
T
A
= 25°C, V
CC
= 3.3V unless otherwise noted.
I
CC
Disabled Current
vs Supply Voltage
V
SDAIN,SCLIN
= 0V
V
ENABLE
= 0V
12
11
10
9
8
7
6
5
Buffer DC I
OL
vs Temperature
3.5
V
SDA,SCL
= 0.6V
V
SDA,SCL
= 0.4V
2
2.5
3
3.5
4
V
CC
(V)
4.5
5
5.5
6
2
2.5
3
3.5
4
V
CC
(V)
4.5
5
5.5
6
4
–50
–25
0
50
25
TEMPERATURE (°C)
75
100
4313213 G01
4313213 G02
4313213 G03
V
OS
vs I
BUS
for Different Driven
Voltage Levels
250
DRIVEN V
SDA,SCL
= 50mV
100mV
I
RTA
(mA)
V
OS
(mV)
16
LTC4313-1 I
RTA
vs Temperature
V
CC
= V
DD,BUS
V
SDA,SCL
= 0.6 • V
DD,BUS
C
BUS
= 400pF R
BUS
= 10k
,
t
F
(70% to 30%)
vs Bus Capacitance
100
V
CC
= V
DD,BUS
R
BUS
= 10k
200
14
75
5V
t
F
(ns)
5V
50
3.3V
25
150
≥200mV
12
100
10
3.3V
50
8
0
0
1
2
3
I
BUS
(mA)
4
5
4313213 G04
6
–50
–25
0
50
25
TEMPERATURE (°C)
75
100
0
0
200
4313213 G05
600
400
C
BUS
(pF)
800
1000
4313213 G06
t
PDHL
(50% to 50%)
vs Bus Capacitance
200
V
CC
= V
DD,BUS
R
BUS
= 10k
5V
t
PDHL
(ns)
t
RISE
(ns)
150
3.3V
125
100
LTC4313-1 Bus Rise Time
(40% to 70%) vs C
BUS
V
CC
= V
DD,BUS
5V
175
75
3.3V
50
100
0
200
600
400
C
BUS
(pF)
800
1000
25
0
200
4313213 G07
400
C
BUS
(pF)
600
800
4313123 G08
4313123f
4
LTC4313-1/LTC4313-2/
LTC4313-3
pin FuncTions
ENABLE (Pin 1):
Connection Enable Input. When driven
low, the ENABLE pin isolates SDAIN and SCLIN from
SDAOUT and SCLOUT, asserts READY low, disables
rise time accelerators and inhibits automatic clock and
stop bit generation during a stuck low fault condition.
When driven high, the ENABLE pin connects SDAIN and
SCLIN to SDAOUT and SCLOUT after a stop bit or bus idle
has been detected on both busses. Driving ENABLE high
also enables automatic clock generation during a stuck
low fault condition. During a stuck low fault condition, a
rising edge on the ENABLE pin forces a connection between
SDAIN and SDAOUT and SCLIN and SCLOUT. When using
the LTC4313 in a Hot Swap™ application with staggered
connector pins, connect a 10k resistor between ENABLE
and GND to ensure correct functionality. Connect to V
CC
if unused.
SCLOUT (Pin 2):
Serial Bus 2 Clock Input/Output. Connect
this pin to the SCL bus segment where stuck low recovery
is desired. Connect an external pull-up resistor or current
source between this pin and the bus supply. The bus supply
needs to be ≥ V
CC
for the LTC4313-1 and LTC4313-2, but
not for the LTC4313-3. Refer to the Applications Informa-
tion section for more details. Do not leave open.
SCLIN (Pin 3):
Serial Bus 1 Clock Input/Output. Connect
this pin to the SCL line on the upstream bus. Connect
an external pull-up resistor or current source between
this pin and the bus supply. The bus supply needs to be
≥ V
CC
for the LTC4313-1 and LTC4313-2, but not for the
LTC4313-3. Refer to the Applications Information section
for more details. Do not leave open.
GND (Pin 4):
Device Ground.
READY (Pin 5):
Connection Ready Status Output. This
open drain N-channel MOSFET output pulls low when
the input and output sides are disconnected. READY is
pulled high when ENABLE is high and a connection has
been established between the input and output. Connect
a pull-up resistor, typically 10k from this pin to the bus
pull-up supply. Leave open or tie to GND if unused.
SDAIN (Pin 6):
Serial Bus 1 Data Input/Output. Connect
this pin to the SDA line on the upstream bus. Connect an
external pull-up resistor or current source between this pin
and the bus supply. The bus supply needs to be ≥ V
CC
for
the LTC4313-1 and LTC4313-2, but not for the LTC4313-3.
Refer to the Applications Information section for more
details. Do not leave open.
SDAOUT (Pin 7):
Serial Bus 2 Data Input/Output. Connect
this pin to the SDA bus segment where stuck low recovery
is desired. Connect an external pull-up resistor or current
source between this pin and the bus supply. The bus supply
needs to be ≥ V
CC
for the LTC4313-1 and LTC4313-2, but
not for the LTC4313-3. Refer to the Applications Informa-
tion section for more details. Do not leave open.
V
CC
(Pin 8):
Power Supply Voltage. Power this pin from
a supply between 2.9V and 5.5V. Bypass with at least
My test plan requires I2C communication. I first tried to enable hardware I2C communication. I wrote I2C single-byte and multi-byte read and write functions referring to the manufacturer's EEPROM read...
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