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LTC4313IDD-2#PBF

Description
2-Wire Bus Buffers with High Noise Margin
File Size277KB,20 Pages
ManufacturerADI
Websitehttps://www.analog.com
Environmental Compliance
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LTC4313IDD-2#PBF Overview

2-Wire Bus Buffers with High Noise Margin

LTC4313IDD-2#PBF Parametric

Parameter NameAttribute value
Brand NameAnalog Devices Inc
Is it lead-free?Contains lead
Is it Rohs certified?conform to
Objectid4002730033
package instruction3 X 3 MM, LEAD FREE, PLASTIC, MO-229WEED-1, DFN-8
Contacts8
Manufacturer packaging code05-08-1698
Reach Compliance Codecompliant
Country Of OriginMalaysia
ECCN codeEAR99
Samacsys ManufacturerAnalog Devices
Samacsys Modified On2023-01-23 14:40:50
YTEOL8.5
Analog Integrated Circuits - Other TypesANALOG CIRCUIT
JESD-30 codeS-PDSO-N8
JESD-609 codee3
length3 mm
Humidity sensitivity level1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHVSON
Package shapeSQUARE
Package formSMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Maximum seat height0.8 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.9 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3 mm
LTC4313-1/LTC4313-2/
LTC4313-3
2-Wire Bus Buffers with
High Noise Margin
FeaTures
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DescripTion
The LTC
®
4313 is a hot swappable 2-wire bus buffer
that provides bidirectional buffering while maintain-
ing a low offset voltage and high noise margin up to
0.3 • V
CC
. The high noise margin allows the LTC4313 to be
interoperable with devices that drive a high V
OL
(>0.4V) and
allows multiple LTC4313s to be cascaded. The LTC4313-1
and LTC4313-2 support level translation between 3.3V and
5V busses. In addition to these voltages, the LTC4313-3
also supports level translation to 1.5V, 1.8V and 2.5V.
During insertion, the SDA and SCL lines are pre-charged to
1V to minimize bus disturbances. Connection is established
between the input and output after ENABLE is asserted
high and a stop bit or bus idle condition has been detected
on the SDA and SCL pins.
If both data and clock are not simultaneously high at least
once in 45ms, the input is disconnected from the output.
Up to 16 clock pulses are subsequently generated to free
the stuck bus. Rise time accelerators (RTAs) provide pull-up
currents on SDA and SCL rising edges to meet rise time
specifications in heavily loaded systems. The RTAs are
configured as slew limited switches in the LTC4313-1 and
2.5mA current sources in the LTC4313-2. The LTC4313-3
does not have RTAs.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6356140, 6650174,
7032051, 7478286.
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Bidirectional Buffer Increases Fanout
High Noise Margin with V
IL
= 0.3•V
CC
Compatible with Non-Compliant I
2
C Devices That
Drive a High V
OL
Strong (LTC4313-1) and 2.5mA (LTC4313-2)
Rise Time Accelerator Current
Level Shift 1.5V, 1.8V, 2.5V, 3.3V and 5V Busses
Prevents SDA and SCL Corruption During Live Board
Insertion and Removal from Backplane
Stuck Bus Disconnect and Recovery
Compatible with I
2
C, I
2
C Fast Mode and SMBus
±4kV Human Body Model ESD Ruggedness
High Impedance SDA, SCL Pins When Unpowered
8-Lead MSOP and 8-Lead (3mm × 3mm) DFN
Packages
applicaTions
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Capacitance Buffers/Bus Extender
Live Board Insertion
Telecommunications Systems Including ATCA
Level Translation
PMBus
Servers
Typical applicaTion
3.3V
5V
400kHz Operation
R
BUS_IN
= 2.7k , C
BUS_IN
= 50pF
R
BUS_OUT
= 1.3k , C
BUS_OUT
= 100pF
0.01µF
2.7k
2.7k
V
CC
ENABLE
LTC4313-1
READY
10k
1.3k
1.3k
SCLOUT
1V/DIV
SCLIN
READY
SCL2
SDA2
500ns/DIV
4313123 TA01b
SCL1
SDA1
SCLIN
SDAIN
GND
SCLOUT
SDAOUT
4313123 TA01a
4313123f
1

LTC4313IDD-2#PBF Related Products

LTC4313IDD-2#PBF LTC4313IMS8-1#PBF LTC4313IDD-1#TRPBF
Description 2-Wire Bus Buffers with High Noise Margin 2-Wire Bus Buffers with High Noise Margin Interface-Signal Buffer, Repeater 2-Wire Bus Buffer with High Noise Margin
Brand Name Analog Devices Inc Analog Devices Inc -
Is it lead-free? Contains lead Contains lead -
Is it Rohs certified? conform to conform to -
Objectid 4002730033 4002733383 -
package instruction 3 X 3 MM, LEAD FREE, PLASTIC, MO-229WEED-1, DFN-8 LEAD FREE, PLASTIC, MSOP-8 -
Contacts 8 8 -
Manufacturer packaging code 05-08-1698 05-08-1660 -
Reach Compliance Code compliant compliant -
Country Of Origin Malaysia Malaysia -
ECCN code EAR99 EAR99 -
Samacsys Manufacturer Analog Devices Analog Devices -
Samacsys Modified On 2023-01-23 14:40:50 2023-03-07 16:10:32 -
YTEOL 8.5 8.5 -
Analog Integrated Circuits - Other Types ANALOG CIRCUIT ANALOG CIRCUIT -
JESD-30 code S-PDSO-N8 S-PDSO-G8 -
JESD-609 code e3 e3 -
length 3 mm 3 mm -
Humidity sensitivity level 1 1 -
Number of functions 1 1 -
Number of terminals 8 8 -
Maximum operating temperature 85 °C 85 °C -
Minimum operating temperature -40 °C -40 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code HVSON TSSOP -
Package shape SQUARE SQUARE -
Package form SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH -
Peak Reflow Temperature (Celsius) 260 260 -
Maximum seat height 0.8 mm 1.1 mm -
Maximum supply voltage (Vsup) 5.5 V 5.5 V -
Minimum supply voltage (Vsup) 2.9 V 2.9 V -
Nominal supply voltage (Vsup) 3.3 V 3.3 V -
surface mount YES YES -
technology CMOS CMOS -
Temperature level INDUSTRIAL INDUSTRIAL -
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed -
Terminal form NO LEAD GULL WING -
Terminal pitch 0.5 mm 0.65 mm -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature 30 30 -
width 3 mm 3 mm -

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