IDT72V82L15PAG datasheet, PDF - EEWORLD Datasheet

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IDT72V82L15PAG: Description1K X 9 BI-DIRECTIONAL FIFO, 15 ns, PDSO56; Categorystorage; File Size131KB，12 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT72V82L15PAG Overview

1K X 9 BI-DIRECTIONAL FIFO, 15 ns, PDSO56

IDT72V82L15PAG Parametric

Parameter Name	Attribute value
maximum clock frequency	40 MHz
Number of functions	1
Number of terminals	56
Minimum operating temperature	0.0 Cel
Maximum operating temperature	70 Cel
Rated supply voltage	3.3 V
Minimum supply/operating voltage	3 V
Maximum supply/operating voltage	3.6 V
Processing package description	GREEN, TSSOP-56
each_compli	Yes
EU RoHS regulations	Yes
state	Active
sub_category	FIFOs
ccess_time_max	15 ns
cycle	25 ns
jesd_30_code	R-PDSO-G56
jesd_609_code	e3
storage density	9216 bi
Memory IC type	OTHER FIFO
memory width	9
moisture_sensitivity_level	1
Number of digits	1024 words
Number of digits	1K
operating mode	ASYNCHRONOUS
organize	1KX9
Output enable	YES
Packaging Materials	PLASTIC/EPOXY
ckage_code	TSSOP
ckage_equivalence_code	TSSOP56,.3,20
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
serial parallel	PARALLEL
eak_reflow_temperature__cel_	260
wer_supplies__v_	3.3
qualification_status	COMMERCIAL
seated_height_max	1.2 mm
standby_current_max	0.0050 Am
Maximum supply voltage	0.1000 Am
surface mount	YES
Craftsmanship	CMOS
Temperature level	COMMERCIAL
terminal coating	MATTE TIN
Terminal form	GULL WING
Terminal spacing	0.5000 mm
Terminal location	DUAL
ime_peak_reflow_temperature_max__s_	30
length	14 mm
width	6.1 mm
dditional_feature	RETRANSMIT

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3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO

DUAL 512 x 9, DUAL 1,024 x 9

DUAL 2,048 x 9, DUAL 4,096 X 9

DUAL 8,192 X 9

IDT72V81

IDT72V82

IDT72V83

IDT72V84

IDT72V85

FEATURES:

•

DESCRIPTION:

The IDT72V81/72V82/72V83/72V84/72V85 are dual-FIFO memories that

load and empty data on a first-in/first-out basis. These devices are functional and

compatible to two IDT72V01/72V02/72V03/72V04/72V05 FIFOs in a single

package with all associated control, data, and flag lines assigned to separate

pins. The devices use Full and Empty flags to prevent data overflow and

underflow and expansion logic to allow for unlimited expansion capability in both

word size and depth.

The reads and writes are internally sequential through the use of ring

pointers, with no address information required to load and unload data. Data

is toggled in and out of the devices through the use of the Write (W) and Read

(R) pins.

The devices utilize a 9-bit wide data array to allow for control and parity

bits at the user’s option. This feature is especially useful in data communications

applications where it is necessary to use a parity bit for transmission/reception

error checking. It also features a Retransmit (RT) capability that allows for reset

of the read pointer to its initial position when

is pulsed low to allow for

retransmission from the beginning of data. A Half-Full Flag is available in the

single device mode and width expansion modes.

These FIFOs are fabricated using IDT’s high-speed CMOS technology.

They are designed for those applications requiring asynchronous and simul-

taneous read/writes in multiprocessing and rate buffer applications.

•

The IDT72V81 is equivalent to two IDT72V01 - 512 x 9 FIFOs

The IDT72V82 is equivalent to two IDT72V02 - 1,024 x 9 FIFOs

The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs

The IDT72V84 is equivalent to two IDT72V04 - 4,096 x 9 FIFOs

The IDT72V85 is equivalent to two IDT72V05 - 8,192 x 9 FIFOs

Low power consumption

— Active: 330 mW (max.)

— Power-down: 18 mW (max.)

Ultra high speed—15 ns access time

Asynchronous and simultaneous read and write

Offers optimal combination of data capacity, small foot print

and functional flexibility

Ideal for bidirectional, width expansion, depth expansion, bus-

matching, and data sorting applications

Status Flags: Empty, Half-Full, Full

Auto-retransmit capability

High-performance CEMOS™ technology

Space-saving TSSOP package

Industrial temperature range (–40°C to +85°C) is available

Green parts available, see ordering information

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

(DA

-DA

)

WRITE

CONTROL

WRITE

POINTER

THREE-

STATE

BUFFERS

RSA

WRITE

CONTROL

WRITE

POINTER

DATA INPUTS

(DB

-DB

)

RSB

RAM

ARRAY A

512 x 9

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

READ

POINTER

RAM

ARRAY A

512 x 9

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

READ

POINTER

THREE-

STATE

BUFFERS

READ

CONTROL

FLAG

LOGIC

EXPANSION

LOGIC

RESET

LOGIC

READ

CONTROL

FLAG

LOGIC

EXPANSION

LOGIC

RESET

LOGIC

XIA

XOA/HFA

FFA

EFA

DATA

OUTPUTS

(QA

-QA

)

FLA/RTA

XIB

XOB/HFB

FFB

EFB

DATA

OUTPUTS

(QB

-QB

)

FLB/RTB

3966 drw 01

IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. The AsyncFIFO is a trademark of Integrated Device Technology, Inc.

COMMERICAL TEMPERATURE RANGE

JULY 2006

DSC-3966/2



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