EEWORLDEEWORLDEEWORLD

Part Number

Search

531EC1395M00DGR

Description
LVPECL Output Clock Oscillator, 1395MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
Categoryoscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531EC1395M00DGR Overview

LVPECL Output Clock Oscillator, 1395MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531EC1395M00DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency1395 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
[RVB2601 Creative Application Development] Short recording, playback and printing of recording data
[i=s]This post was last edited by onoff on 2022-6-4 18:01[/i]Refer to the examples on the official website, the SDK examples, and ch2601_ft_demo.I transplanted ft.c to my own project. The c file and s...
onoff XuanTie RISC-V Activity Zone
When the carrier data reaches the receiving end, how does the receiving end identify this information?
I would like to ask: For the signals composed of multiple identical waveforms as shown in 1, 2, and 3 in the following figure, when the carrier data reaches the receiving end, how does the receiving e...
深圳小花 MCU
SparkRoad Review (7) - FPGA Serial Port Test
Anlu's development board is equipped with a USB2UART module, which is connected to the USB-to-serial port through the microcontroller on the board. It is not possible to open the built-in routine 6_ua...
bigbat Domestic Chip Exchange
Disable AD auto-start JLink
After reinstalling AD, JLink suddenly stopped working. I found that JLink was automatically started when running AD.Just uncheck these two....
LinQian_Sun Embedded System
Seeking guidance - stc microcontroller remote upgrade program
I've been studying the remote upgrade function of stc microcontrollers recently. I searched online for some solutions proposed by predecessors, but I still feel confused. I have a question, so I'm her...
曹旭华 51mcu
Problems with creating sheet symbols for multi-page schematics
When AD designs a multi-page schematic, do I need to add a sheet symbol? design----create sheet symbol from sheet or HDL. I see that some designs have it added, but some designs have not....
平漂流 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号