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IDT71V632S5PFGI8

Description
Cache SRAM, 64KX32, 5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Categorystorage   
File Size282KB,19 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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IDT71V632S5PFGI8 Overview

Cache SRAM, 64KX32, 5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100

IDT71V632S5PFGI8 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionLQFP, QFP100,.63X.87
Contacts100
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time5 ns
Other featuresALSO REQUIRES 3.3V I/O SUPPLY
Maximum clock frequency (fCLK)100 MHz
I/O typeCOMMON
JESD-30 codeR-PQFP-G100
JESD-609 codee3
length20 mm
memory density2097152 bit
Memory IC TypeCACHE SRAM
memory width32
Humidity sensitivity level3
Number of functions1
Number of terminals100
word count65536 words
character code64000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize64KX32
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP100,.63X.87
Package shapeRECTANGULAR
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum standby current0.015 A
Minimum standby current3.14 V
Maximum slew rate0.2 mA
Maximum supply voltage (Vsup)3.63 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width14 mm
Base Number Matches1
64K x 32
3.3V Synchronous SRAM
Pipelined Outputs
Burst Counter, Single Cycle Deselect
Features
IDT71V632/Z
64K x 32 memory configuration
Supports high system speed:
Commercial:
– A4 4.5ns clock access time (117 MHz)
Commercial and Industrial:
– 5 5ns clock access time (100 MHz)
– 6 6ns clock access time (83 MHz)
– 7 7ns clock access time (66 MHz)
Single-cycle deselect functionality (Compatible with
Micron Part # MT58LC64K32D7LG-XX)
LBO
input selects interleaved or linear burst mode
Self-timed write cycle with global write control (GW), byte
write enable (BWE), and byte writes (BWx)
Power down controlled by ZZ input
Operates with a single 3.3V power supply (+10/-5%)
Packaged in a JEDEC Standard 100-pin rectangular plastic
thin quad flatpack (TQFP).
Description
The IDT71V632 is a 3.3V high-speed SRAM organized as 64K x 32
with full support of the Pentium™ and PowerPC™ processor interfaces.
The pipelined burst architecture provides cost-effective 3-1-1-1 second-
ary cache performance for processors up to 117MHz.
The IDT71V632 SRAM contains write, data, address, and control
registers. Internal logic allows the SRAM to generate a self-timed write
based upon a decision which can be left until the extreme end of the write
cycle.
The burst mode feature offers the highest level of performance to the
system designer, as the IDT71V632 can provide four cycles of data for
a single address presented to the SRAM. An internal burst address counter
accepts the first cycle address from the processor, initiating the access
sequence. The first cycle of output data will be pipelined for one cycle before
it is available on the next rising clock edge. If burst mode operation is
selected (ADV=LOW), the subsequent three cycles of output data will be
available to the user on the next three rising clock edges. The order of these
three addresses will be defined by the internal burst counter and the
LBO
input pin.
The IDT71V632 SRAM utilizes IDT's high-performance, high-volume
3.3V CMOS process, and is packaged in a JEDEC Standard 14mm x
20mm 100-pin thin plastic quad flatpack (TQFP) for optimum board density
in both desktop and notebook applications.
Pin Description Summary
A
0
–A
15
CE
CS
0
,
CS
1
OE
GW
BWE
BW
1,
BW
2,
BW
3,
BW
4
CLK
ADV
ADSC
ADSP
LBO
ZZ
I/O
0
–I/O
31
V
DD
, V
DDQ
V
SS
, V
SSQ
Ad d re ss Inp uts
Chip Enab le
Chip s Se le cts
Outp ut Enab le
Glo b al Write Enab le
Byte Write Enab le
Ind ivid ual Byte Write Se le cts
Clo ck
Burst Ad d re ss Ad vance
Ad d re ss Status (Cache Co ntro lle r)
Ad d re ss Status (Pro ce sso r)
Line ar / Inte rle ave d Burst Ord e r
S le e p Mo d e
Data Inp ut/Outp ut
3.3V
Array Gro und , I/O Gro und
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
Inp ut
I/O
Po we r
Po we r
Synchro no us
Synchro no us
Synchro no us
Asynchro no us
Synchro no us
Synchro no us
Synchro no us
N/A
Synchro no us
Synchro no us
Synchro no us
DC
Asynchro no us
Synchro no us
N/A
N/A
3619 tb l 01
Pentium processor is a trademark of Intel Corp.
PowerPC is a trademark of International Business Machines, Inc.
MAY 2010
1
DSC-3619/07
©2010 Integrated Device Technology, Inc.

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Description Cache SRAM, 64KX32, 5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 64KX32, 7ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, POWER, PLASTIC, TQFP-100 Cache SRAM, 64KX32, 7ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 64KX32, 7ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 64KX32, 5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 64KX32, 6ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 64KX32, 6ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Is it lead-free? Lead free Lead free Lead free Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to conform to conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFP QFP QFP QFP QFP QFP QFP
package instruction LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87 LQFP, QFP100,.63X.87
Contacts 100 100 100 100 100 100 100
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 5 ns 7 ns 7 ns 7 ns 5 ns 6 ns 6 ns
Other features ALSO REQUIRES 3.3V I/O SUPPLY ALSO REQUIRES 3.3V I/O SUPPLY ALSO REQUIRES 3.3V I/O SUPPLY ALSO REQUIRES 3.3V I/O SUPPLY ALSO REQUIRES 3.3V I/O SUPPLY ALSO REQUIRES 3.3V I/O SUPPLY ALSO REQUIRES 3.3V I/O SUPPLY
Maximum clock frequency (fCLK) 100 MHz 66 MHz 66 MHz 66 MHz 100 MHz 83 MHz 83 MHz
I/O type COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 code R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100
JESD-609 code e3 e3 e3 e3 e3 e3 e3
length 20 mm 20 mm 20 mm 20 mm 20 mm 20 mm 20 mm
memory density 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit
Memory IC Type CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM
memory width 32 32 32 32 32 32 32
Humidity sensitivity level 3 3 3 3 3 3 3
Number of functions 1 1 1 1 1 1 1
Number of terminals 100 100 100 100 100 100 100
word count 65536 words 65536 words 65536 words 65536 words 65536 words 65536 words 65536 words
character code 64000 64000 64000 64000 64000 64000 64000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C 70 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C - -40 °C -40 °C -40 °C
organize 64KX32 64KX32 64KX32 64KX32 64KX32 64KX32 64KX32
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP LQFP LQFP LQFP LQFP LQFP
Encapsulate equivalent code QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260 260
power supply 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.6 mm 1.6 mm 1.6 mm 1.6 mm 1.6 mm 1.6 mm 1.6 mm
Maximum standby current 0.015 A 0.015 A 0.015 A 0.015 A 0.015 A 0.015 A 0.015 A
Minimum standby current 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V
Maximum slew rate 0.2 mA 0.16 mA 0.16 mA 0.16 mA 0.2 mA 0.18 mA 0.18 mA
Maximum supply voltage (Vsup) 3.63 V 3.63 V 3.63 V 3.63 V 3.63 V 3.63 V 3.63 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL COMMERCIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Terminal location QUAD QUAD QUAD QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 30 30 30 30 30 30 30
width 14 mm 14 mm 14 mm 14 mm 14 mm 14 mm 14 mm
Base Number Matches 1 1 1 1 1 1 1
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