WED3DG6318V10D2 datasheet, PDF

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WED3DG6318V10D2: DescriptionSynchronous DRAM Module, 16MX64, CMOS, DIMM-168; Categorystorage storage; File Size457KB，6 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com

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WED3DG6318V10D2 Overview

Synchronous DRAM Module, 16MX64, CMOS, DIMM-168

WED3DG6318V10D2 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Microsemi
Parts packaging code	DIMM
package instruction	,
Contacts	168
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N168
memory density	1073741824 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	168
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	16MX64
Package body material	UNSPECIFIED
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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WED3DG6418V-D2

128MB- 16M x 64 SDRAM UNBUFFERED

FEATURES

Burst Mode Operation

Auto and Self Refresh capability

LVTTL compatible inputs and outputs

Serial Presence Detect with EEPROM

Fully synchronous: All signals are registered on the positive

edge of the system clock

Programmable Burst Lengths: 1, 2, 4, 8 or Full Page

3.3 volt

0.3v Power Supply

168- Pin DIMM JEDEC

This datasheet describes a product that may or may not be under development

and is subject to change or cancellation without notice.

DESCRIPTION

The WED3DG6418V is a 16Mx64 synchronous DRAM module

which consists of eight 16Mx8 SDRAM components in TSOP- 11

package and one 2K EEPROM in an 8- pin TSSOP package for

Serial Presence Detect which are mounted on a 168 Pin DIMM

multilayer FR4 Substrate.

PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)

Front

VSS

DQ0

DQ1

DQ2

DQ3

VDD

DQ4

DQ5

DQ6

DQ7

DQ8

VSS

DQ9

DQ10

DQ11

DQ12

DQ13

VDD

DQ14

DQ15

*CB0

*CB1

VSS

VDD

DQM0

Front

DQM1

CS0

DNU

VSS

A10/AP

BA1

VDD

CLK0

VSS

DNU

CS2

DQM2

DQM3

DNU

VDD

*CB2

*CB3

VSS

DQ16

DQ17

Front

DQ18

DQ19

VDD

DQ20

*VREF

*CKE1

VSS

DQ21

DQ22

DQ23

VSS

DQ24

DQ25

DQ26

DQ27

VDD

DQ28

DQ29

DQ30

DQ31

VSS

CLK2

WP***

**SDA

**SCL

VDD

100

101

102

103

104

105

106

107

108

109

110

111

112

Back

VSS

DQ32

DQ33

DQ34

DQ35

VDD

DQ36

DQ37

DQ38

DQ39

DQ40

VSS

DQ41

DQ42

DQ43

DQ44

DQ45

VDD

DQ46

DQ47

*CB4

*CB5

VSS

VDD

CAS

DQM4

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

Back

DQM5

CS1

RAS

VSS

BA0

A11

VDD

*CLK1

*A12

VSS

CKE0

*CS3

DQM6

DQM7

*A13

VDD

*CB6

*CB7

VSS

DQ48

DQ49

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

Back

DQ50

DQ51

VDD

DQ52

*VREF

DNU

VSS

DQ53

DQ54

DQ55

VSS

DQ56

DQ57

DQ58

DQ59

VDD

DQ60

DQ61

DQ62

DQ63

VSS

*CLK3

**SA0

**SA1

**SA2

VDD

PIN NAMES

A0 A11

BA0-1

DQ0-63

CLK0,CLK2

CKE0

CS0,CS2

RAS

CAS

DQM0-7

VDD

VSS

SDA

SCL

DNU

Address input (Multiplexed)

Select Bank

Data Input/Output

Clock input

Clock Enable input

Chip select Input

Row Address Strobe

Column Address Strobe

Write Enable

DQM

Power Supply (3.3V)

Ground

Serial data I/O

Serial clock

Do not use

No Connect

Write Protect

* These pins are not used in this module.

** These pins should be NC in the system which

does not support SPD.

*** WP available on the WED3DG6318V-D2.

Aug. 2002 Rev. 0

ECO #15455

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

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