NC7SZ00M5_NL datasheet, PDF - EEWORLD Datasheet

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NC7SZ00M5_NL: DescriptionLVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5; Categorylogic logic; File Size132KB，9 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/; Environmental Compliance

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NC7SZ00M5_NL Overview

LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5

NC7SZ00M5_NL Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Fairchild
Parts packaging code	SOIC
package instruction	LSSOP, TSOP5/6,.11,37
Contacts	5
Reach Compliance Code	compli
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G5
JESD-609 code	e3
length	2.9 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of functions	1
Number of entries	2
Number of terminals	5
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LSSOP
Encapsulate equivalent code	TSOP5/6,.11,37
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Su	5.2 ns
propagation delay (tpd)	12 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.4 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.95 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	1.6 mm

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NC7SZ00 TinyLogic£ UHS 2-Input NAND Gate

October 1996

Revised February 2005

NC7SZ00

TinyLogic£ UHS 2-Input NAND Gate

General Description

The NC7SZ00 is a single 2-Input NAND Gate from

Fairchild's Ultra High Speed Series of TinyLogic

. The

device is fabricated with advanced CMOS technology to

achieve ultra high speed with high output drive while main-

taining low static power dissipation over a broad V

oper-

ating range. The device is specified to operate over the

1.65V to 5.5V V

operating range. The inputs and output

are high impedance when V

is 0V. Inputs tolerate volt-

ages up to 6V independent of V

operating voltage.

Features

■

Space saving SOT23 or SC70 5-lead package

■

Ultra small MicroPak

Pb-Free leadless package

■

Ultra High Speed; t

2.4 ns typ into 50 pF at 5V V

■

High Output Drive;

24 mA at 3V V

■

Broad V

Operating Range; 1.65V–5.5V

■

Matches the performance of LCX when operated at

3.3V V

■

Power down high impedance inputs/output

■

Overvoltage tolerant inputs facilitate 5V to 3V translation

■

Patented noise/EMI reduction circuitry implemented

Ordering Code:

Order Number

NC7SZ00M5X

NC7SZ00M5_NL

(Note 1)

NC7SZ00M5X_NL

(Note 2)

NC7SZ00P5X

NC7SZ00P5_NL

(Note 1)

NC7SZ00P5X_NL

(Note 2)

NC7SZ00L6X

Package

Number

MA05B

MAA05A

MAC06A

Product Code

Top Mark

7Z00

Z00

Package Description

5-Lead SOT23, JEDEC MO-178, 1.6mm

Pb-Free 5-Lead SOT23, JEDEC MO-178,

1.6mm

Pb-Free 5-Lead SOT23, JEDEC MO-178,

1.6mm

5-Lead SC70, EIAJ SC-88a, 1.25mm Wide

Pb-Free 6-Lead MicroPak, 1.0mm Wide

Supplied As

3k Units on Tape and Reel

5k Units on Tape and Reel

Pb-Free package per JEDEC J-STD-020B.

Note 1:

“_NL” indicates lead-free product (per JEDEC J-STD-020B).

Note 2:

“_NL” indicates lead-free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.

TinyLogic

is a registered trademark of Fairchild Semiconductor Corporation.

MicroPak

is a trademark of Fairchild Semiconductor Corporation.

DS012156

www.fairchildsemi.com

NC7SZ00M5_NL Related Products

	NC7SZ00M5_NL	NC7SZ00	NC7SZ00_05	NC7SZ00L6X	NC7SZ00P5X_NL	NC7SZ00M5X_NL
Description	LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5	LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5	LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5	LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO6	LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5	LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
Number of functions	1	1	1	1	1	1
Number of terminals	5	5	5	6	5	5
Maximum operating temperature	85 °C	85 Cel	85 Cel	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 Cel	-40 Cel	-40 °C	-40 °C	-40 °C
surface mount	YES	Yes	Yes	YES	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING	GULL WING	NO LEAD	GULL WING	GULL WING
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Is it Rohs certified?	conform to	-	-	conform to	conform to	conform to
Parts packaging code	SOIC	-	-	MICROPAK MLP	SOIC	SOIC
package instruction	LSSOP, TSOP5/6,.11,37	-	-	1 MM, MO-252UAAD, MICROPACK-6	TSSOP, TSSOP5/6,.08	LSSOP, TSOP5/6,.11,37
Contacts	5	-	-	6	5	5
Reach Compliance Code	compli	-	-	unknow	compli	compli
JESD-30 code	R-PDSO-G5	-	-	R-PDSO-N6	R-PDSO-G5	R-PDSO-G5
JESD-609 code	e3	-	-	e4	e3	e3
length	2.9 mm	-	-	1.45 mm	2 mm	2.9 mm
Load capacitance (CL)	50 pF	-	-	50 pF	50 pF	50 pF
Logic integrated circuit type	NAND GATE	-	-	NAND GATE	NAND GATE	NAND GATE
MaximumI(ol)	0.024 A	-	-	0.024 A	0.024 A	0.024 A
Humidity sensitivity level	1	-	-	1	1	1
Number of entries	2	-	-	2	2	2
Package body material	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LSSOP	-	-	VSON	TSSOP	LSSOP
Encapsulate equivalent code	TSOP5/6,.11,37	-	-	SOLCC6,.04,20	TSSOP5/6,.08	TSOP5/6,.11,37
Package shape	RECTANGULAR	-	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH	-	-	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	-	-	260	260	260
power supply	3.3 V	-	-	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Su	5.2 ns	-	-	5.2 ns	5.2 ns	5.2 ns
propagation delay (tpd)	12 ns	-	-	12 ns	12 ns	12 ns
Certification status	Not Qualified	-	-	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	-	-	NO	NO	NO
Maximum seat height	1.4 mm	-	-	0.55 mm	1.1 mm	1.4 mm
Maximum supply voltage (Vsup)	5.5 V	-	-	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1.65 V	-	-	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	1.8 V	-	-	1.8 V	1.8 V	1.8 V
technology	CMOS	-	-	CMOS	CMOS	CMOS
Terminal surface	Matte Tin (Sn)	-	-	Nickel/Palladium/Gold (Ni/Pd/Au)	Matte Tin (Sn)	Matte Tin (Sn)
Terminal pitch	0.95 mm	-	-	0.5 mm	0.65 mm	0.95 mm
Maximum time at peak reflow temperature	NOT SPECIFIED	-	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	1.6 mm	-	-	1 mm	1.25 mm	1.6 mm

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