FDS3992
August 2004
FDS3992
Dual N-Channel PowerTrench
®
MOSFET
100V, 4.5A, 62mΩ
Features
• r
DS(ON)
= 54mΩ (Typ.), V
GS
= 10V, I
D
= 4.5A
• Q
g
(tot) = 11nC (Typ.), V
GS
= 10V
• Low Miller Charge
• Low Q
RR
Body Diode
• Optimized efficiency at high frequencies
• UIS Capability (Single Pulse and Repetitive Pulse)
Applications
• DC/DC converters and Off-Line UPS
• Distributed Power Architectures and VRMs
• Primary Switch for 24V and 48V Systems
• High Voltage Synchronous Rectifier
• Direct Injection / Diesel Injection Systems
• 42V Automotive Load Control
Formerly developmental type 82745
•
Electronic Valve Train Systems
Branding Dash
(1)
(2)
(8)
(7)
5
1
2
3
4
(3)
(4)
(6)
(5)
SO-8
MOSFET Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
V
DSS
V
GS
Drain to Source Voltage
Gate to Source Voltage
Drain Current
I
D
Continuous (T
A
= 25
o
C, V
GS
= 10V, R
θJA
= 50
o
C/W)
Continuous (T
A
= 100 C, V
GS
= 10V, R
θJA
= 50 C/W)
Pulsed
Single Pulse Avalanche Energy (Note 1)
Total Package Power Dissipation
Derate above 25 C
Operating and Storage Temperature
o
o
o
Parameter
Ratings
100
±20
4.5
2.8
Figure 4
167
2.5
20
-55 to 150
Units
V
V
A
A
A
mJ
W
mW/
o
C
o
E
AS
P
D
T
J
, T
STG
C
Thermal Characteristics
R
θJA
R
θJA
R
θJC
Thermal Resistance, Junction to Ambient at 10 seconds
(Note 3)
Thermal Resistance, Junction to Ambient at 1000 seconds
(Note 3)
Thermal Resistance, Junction to Case
(Note 2)
50
85
25
o
C/W
C/W
o
C/W
o
Package Marking and Ordering Information
Device Marking
FDS3992
Device
FDS3992
Package
SO-8
Reel Size
330mm
Tape Width
12mm
Quantity
2500 units
©2004 Fairchild Semiconductor Corporation
FDS3992 Rev. B1
FDS3992
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
B
VDSS
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= 250µA, V
GS
= 0V
V
DS
= 80V
V
GS
= 0V
V
GS
=
±20V
T
C
= 150 C
o
100
-
-
-
-
-
-
-
-
1
250
±100
V
µA
nA
On Characteristics
V
GS(TH)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250µA
I
D
= 4.5A, V
GS
= 10V
r
DS(ON)
Drain to Source On Resistance
I
D
= 2A, V
GS
= 6V
I
D
= 4.5A, V
GS
= 10V,
T
C
= 150
o
C
2
-
-
-
-
0.054
0.072
0.107
4
0.062
0.108
0.123
Ω
V
Dynamic Characteristics
C
ISS
C
OSS
C
RSS
Q
g(TOT)
Q
g(TH)
Q
gs
Q
gs2
Q
gd
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller” Charge
(V
GS
= 10V)
-
-
V
DD
= 50V, I
D
= 4.5A
V
GS
= 10V, R
GS
= 27Ω
-
-
-
-
-
8
23
28
26
-
47
-
-
-
-
81
ns
ns
ns
ns
ns
ns
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
V
GS
= 0V to 10V
V
GS
= 0V to 2V
V
DD
= 50V
I
D
= 4.5A
I
g
= 1.0mA
-
-
-
-
-
-
-
-
750
118
27
11
1.4
3.5
2.1
2.8
-
-
-
15
1.9
-
-
-
pF
pF
pF
nC
nC
nC
nC
nC
Switching Characteristics
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Drain-Source Diode Characteristics
V
SD
t
rr
Q
RR
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
I
SD
= 4.5A
I
SD
= 2A
I
SD
= 4.5A, dI
SD
/dt= 100A/µs
I
SD
= 4.5A, dI
SD
/dt= 100A/µs
-
-
-
-
-
-
-
-
1.25
1.0
48
65
V
V
ns
nC
Notes:
1:
Starting T
J
= 25°C, L = 37mH, I
AS
= 3A.
2:
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user’s board design.
3:
R
θJA
is measured with 1.0 in
2
copper on FR-4 board
©2004 Fairchild Semiconductor Corporation
FDS3992 Rev. B1
FDS3992
Typical Characteristics
T
A
= 25°C unless otherwise noted
1.2
POWER DISSIPATION MULTIPLIER
5
V
GS
= 10V
1.0
I
D
, DRAIN CURRENT (A)
0
25
50
75
100
125
150
4
0.8
3
0.6
2
0.4
1
0.2
0
25
50
75
100
125
150
T
A
, AMBIENT TEMPERATURE (
o
C)
T
A
, AMBIENT TEMPERATURE (
o
C)
0
Figure 1. Normalized Power Dissipation vs
Ambient Temperature
2
1
Figure 2. Maximum Continuous Drain Current vs
Ambient Temperature
Z
θJA
, NORMALIZED
THERMAL IMPEDANCE
0.1
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
R
θJA
=50
o
C/W
0.01
SINGLE PULSE
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJA
x R
θJA
+ T
A
0.001
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
t, RECTANGULAR PULSE DURATION (s)
10
1
10
2
10
3
Figure 3. Normalized Maximum Transient Thermal Impedance
200
100
I
DM
, PEAK CURRENT (A)
T
A
= 25
o
C
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I = I
25
150 - T
C
125
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
V
GS
= 10V
10
1
10
-5
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (s)
10
0
10
1
10
2
10
3
Figure 4. Peak Current Capability
©2004 Fairchild Semiconductor Corporation
FDS3992 Rev. B1
FDS3992
Typical Characteristics
T
A
= 25°C unless otherwise noted
200
100
7
10µs
I
AS
, AVALANCHE CURRENT (A)
STARTING T
J
= 25
o
C
I
D
, DRAIN CURRENT (A)
10
100µs
1
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
0.1
SINGLE PULSE
T
J
= MAX RATED
T
C
= 25
o
C
0.01
0.1
1
10
100
300
1ms
10ms
100ms
STARTING T
J
= 150
o
C
1
1s
0.1
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
0.1
1
10
t
AV
, TIME IN AVALANCHE (ms)
100
0.01
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 5.
Forward Bias Safe Operating Area
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 6.
Unclamped Inductive Switching
Capability
30
25
I
D
, DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
I
D
, DRAIN CURRENT (A)
30
T
A
= 25
o
C
25
V
GS
= 10V
20
20
V
GS
= 7V
15
V
GS
= 6V
10
V
GS
= 5V
5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
15
T
J
= 150
o
C
10
T
J
= 25
o
C
T
J
=
5
-55
o
C
0
3.5
4.0
4.5
5.0
5.5
6.0
V
GS
, GATE TO SOURCE VOLTAGE (V)
6.5
0
0
0.5
1.0
1.5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
2.0
Figure 7. Transfer Characteristics
80
DRAIN TO SOURCE ON RESISTANCE (m
Ω)
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
V
GS
= 6V
75
2.5
Figure 8. Saturation Characteristics
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2.0
70
65
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
60
V
GS
= 10V
1.5
1.0
55
V
GS
= 10V, I
D
= 4.5A
50
1.0
1.5
2.0
2.5
3.0
3.5
I
D
, DRAIN CURRENT (A)
4.0
4.5
0.5
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
Figure 9. Drain to Source On Resistance vs Drain
Current
Figure 10. Normalized Drain to Source On
Resistance vs Junction Temperature
©2004 Fairchild Semiconductor Corporation
FDS3992 Rev. B1
FDS3992
Typical Characteristics
T
A
= 25°C unless otherwise noted
1.2
V
GS
= V
DS
, I
D
= 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.2
I
D
= 250µA
NORMALIZED GATE
THRESHOLD VOLTAGE
1.0
1.1
0.8
1.0
0.6
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
0.9
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
Figure 11. Normalized Gate Threshold Voltage vs
Junction Temperature
2000
1000
C, CAPACITANCE (pF)
Figure 12. Normalized Drain to Source
Breakdown Voltage vs Junction Temperature
10
V
DD
= 50V
V
GS
, GATE TO SOURCE VOLTAGE (V)
8
C
ISS
=
C
GS
+ C
GD
C
OSS
≅
C
DS
+ C
GD
6
100
C
RSS
=
C
GD
4
2
V
GS
= 0V, f = 1MHz
10
0.1
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
100
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 4.5A
I
D
= 2A
0
2
4
6
8
Q
g
, GATE CHARGE (nC)
10
12
0
Figure 13. Capacitance vs Drain to Source
Voltage
Figure 14. Gate Charge Waveforms for Constant
Gate Currents
©2004 Fairchild Semiconductor Corporation
FDS3992 Rev. B1
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