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MT55L128L32P1F-7.5IT

Description
ZBT SRAM, 128KX32, 4.2ns, CMOS, PBGA165, FBGA-165
Categorystorage    storage   
File Size492KB,31 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

MT55L128L32P1F-7.5IT Overview

ZBT SRAM, 128KX32, 4.2ns, CMOS, PBGA165, FBGA-165

MT55L128L32P1F-7.5IT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerCypress Semiconductor
Parts packaging codeBGA
package instructionTBGA,
Contacts165
Reach Compliance Codenot_compliant
ECCN code3A991.B.2.A
Maximum access time4.2 ns
JESD-30 codeR-PBGA-B165
JESD-609 codee0
length15 mm
memory density4194304 bit
Memory IC TypeZBT SRAM
memory width32
Number of functions1
Number of terminals165
word count131072 words
character code128000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX32
Package body materialPLASTIC/EPOXY
encapsulated codeTBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
width13 mm
Base Number Matches1
PRELIMINARY
4Mb: 256K x 18, 128K x 32/36
PIPELINED ZBT SRAM
4Mb
ZBT
®
SRAM
FEATURES
High frequency and 100 percent bus utilization
Fast cycle times: 6ns, 7.5ns and 10ns
Single +3.3V ±5% power supply (V
DD
)
Separate +3.3V or +2.5V isolated output buffer
supply (V
DD
Q)
Advanced control logic for minimum control
signal interface
Individual BYTE WRITE controls may be tied LOW
Single R/W# (read/write) control pin
CKE# pin to enable clock and suspend operations
Three chip enables for simple depth expansion
Clock-controlled and registered addresses, data
I/Os and control signals
Internally self-timed, fully coherent WRITE
Internally self-timed, registered outputs to
eliminate the need to control OE#
SNOOZE MODE for reduced-power standby
Common data inputs and data outputs
Linear or interleaved burst modes
Burst feature (optional)
Pin/function compatibility with 2Mb, 8Mb, and
16Mb ZBT SRAM family
Automatic power-down
165-pin FBGA package
100-pin TQFP package
119-pin BGA package
MT55L256L18P1, MT55L256V18P1,
MT55L128L32P1, MT55L128V32P1,
MT55L128L36P1, MT55L128V36P1
3.3V V
DD
, 3.3V or 2.5V I/O
100-Pin TQFP
1
165-Pin FBGA
(Preliminary Package Data)
OPTIONS
• Timing (Access/Cycle/MHz)
3.5ns/6ns/166 MHz
4.2ns/7.5ns/133 MHz
5ns/10ns/100 MHz
• Configurations
3.3V I/O
256K x 18
128K x 32
128K x 36
2.5V I/O
256K x 18
128K x 32
128K x 36
• Package
100-pin TQFP
165-pin FBGA
119-pin, 14mm x 22mm BGA
• Operating Temperature Range
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)**
Part Number Example:
MARKING*
-6
-7.5
-10
MT55L256L18P1
MT55L128L32P1
MT55L128L36P1
MT55L256V18P1
MT55L128V32P1
MT55L128V36P1
T
F
B
None
IT
NOTE:
1. JEDEC-standard MS-026 BHA (LQFP).
2. JEDEC-standard MS-028 BHA (PBGA).
119-Pin BGA
2
MT55L256L18P1T-10
4Mb: 256K x 18, 128K x 32/36 Pipelined ZBT SRAM
MT55L256L18P1_C.p65 – Rev. 6/01
* A Part Marking Guide for the FBGA devices can be found on Micron’s
web site—http://www.micron.com/support/index.html.
** Industrial temperature range offered in specific speed grades and
confgurations. Contact factory for more information.
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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