Intel’s 28F010 CMOS flash memory offers the most cost-effective and reliable alternative for read write
random access nonvolatile memory The 28F010 adds electrical chip-erasure and reprogramming to familiar
EPROM technology Memory contents can be rewritten in a test socket in a PROM-programmer socket on-
board during subassembly test in-system during final test and in-system after-sale The 28F010 increases
memory flexibility while contributing to time- and cost-savings
The 28F010 is a 1024-kilobit nonvolatile memory organized as 131 072 bytes of 8 bits Intel’s 28F010 is
offered in 32-pin Plastic DIP or 32-lead PLCC packages Pin assignments conform to JEDEC standards
Extended erase and program cycling capability is designed into Intel’s ETOX
TM
III (EPROM Tunnel Oxide)
process technology Advanced oxide processing an optimized tunneling structure and lower electric field
combine to extend reliable cycling beyond that of traditional EEPROMs With the 12 0V V
PP
supply the
28F010 performs a minimum of 1 000 erase and program cycles well within the time limits of the Quick-Pulse
Programming and Quick-Erase algorithms
Intel’s 28F010 employs advanced CMOS circuitry for systems requiring high-performance access speeds low
power consumption and immunity to noise Its 120 nanosecond access time provides no-WAIT-state perform-
ance for a wide range of microprocessors and microcontrollers Maximum standby current of 300
mA
trans-
lates into power savings when the device is deselected Finally the highest degree of latch-up protection is
achieved through Intel’s unique EPI processing Prevention of latch-up is provided for stresses up to 100 mA
on address and data pins from
b
1V to V
CC
a
1V
With Intel’s ETOX III process base the 28F010 leverages years of EPROM experience to yield the highest
levels of quality reliability and cost-effectiveness
In order to meet the rigorous environmental requirements of automotive applications Intel offers the 28F010 in
extended automotive temperature range Read and write characteristics are guaranteed over the range of
b
40 C to
a
125 C ambient
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT
INTEL CORPORATION 1995
November 1995
Order Number 290266-004
A28F010
290266 –1
Figure 1 28F010 Block Diagram
AUTOMOTIVE TEMPERATURE FLASH
MEMORIES
The Intel Automotive Flash memories have received
additional processing to enhance product character-
istics The automotive temperature range is
b
40 C
to
a
125 C during the read write erase program
operations
Speed
Versions
150
120
Packaging Options
Plastic DIP
AP
AP
PLCC
AN
AN
2
A28F010
28F010
290266 –3
290266 –2
Figure 2 28F010 Pin Configurations
Table 1 Pin Description
Symbol
A
0
–A
16
DQ
0
– DQ
7
Type
INPUT
INPUT OUTPUT
Name and Function
ADDRESS INPUTS
for memory addresses Addresses are internally
latched during a write cycle
DATA INPUT OUTPUT
Inputs data during memory write cycles
outputs data during memory read cycles The data pins are active high
and float to tri-state OFF when the chip is deselected or the outputs
are disabled Data is internally latched during a write cycle
CHIP ENABLE
Activates the device’s control logic input buffers
decoders and sense amplifiers CE is active low CE high
deselects the memory device and reduces power consumption to
standby levels
OUTPUT ENABLE
Gates the devices output through the data buffers
during a read cycle OE is active low
WRITE ENABLE
Controls writes to the control register and the array
Write enable is active low Addresses are latched on the falling edge
and data is latched on the rising edge of the WE pulse
Note
With V
PP
s
6 5V memory contents cannot be altered
ERASE PROGRAM POWER SUPPLY
for writing the command
register erasing the entire array or programming bytes in the array
DEVICE POWER SUPPLY
(5V
g
10%)
GROUND
NO INTERNAL CONNECTION
to device Pin may be driven or left
floating
CE
INPUT
OE
WE
INPUT
INPUT
V
PP
V
CC
V
SS
NC
3
A28F010
Designing with the in-circuit alterable 28F010 elimi-
nates socketed memories reduces overall material
costs and drastically cuts the labor costs associat-
ed with code updates With the 28F010 code up-
dates are implemented locally via an edge-connec-
tor or remotely over a serial communication link
The 28F010’s electrical chip-erasure byte repro-
grammability and complete nonvolatility fit well with
data accumulation needs Electrical chip-erasure
gives the designer a ‘‘blank-slate’’ in which to log
data Data can be periodically off-loaded for analy-
sis erasing the slate and repeating the cycle Or
multiple devices can maintain a ‘‘rolling window’’ of
accumulated data
With high density nonvolatility and extended cycling
capability the 28F010 offers an innovative alterna-
tive for mass storage Integrating main memory and
backup storage functions into directly executable
flash memory boosts system performance shrinks
system size and cuts power consumption Reliability
exceeds that of electromechanical media with
greater durability in extreme environmental condi-
tions
A high degree of on-chip feature integration simpli-
fies memory-to-processor interfacing Figure 3 de-
picts two 28F010s tied to the 80C186 system bus
The 28F010’s architecture minimizes interface cir-
cuitry needed for complete in-circuit updates of
memory contents
With cost-effective in-system reprogramming and
extended cycling capability the 28F010 fills the
functionality gap between traditional EPROMs and
EEPROMs
EPROM-compatible
specifications
straightforward interfacing and in-circuit alterability
allows designers to easily augment memory flexibili-
ty and satisfy the need for updatable nonvolatile
storage in today’s designs
APPLICATIONS
The 28F010 flash-memory adds electrical chip-era-
sure and reprogrammability to EPROM non-volatility
and ease of use The 28F010 is ideal for storing
code or data-tables in applications where periodic
updates are required The 28F010 also serves as a
dense nonvolatile data acquisition and storage me-
dium
The need for code updates pervades all phases of a
system’s life from prototyping to system manufac-
ture to after-sale service In the factory during proto-
typing revisions to control code necessitate ultravio-
let erasure and reprogramming of EPROM-based
prototype codes The 28F010 replaces the 15- to
20-minute ultraviolet erasure with one-second elec-
trical erasure Electrical chip-erasure and repro-
gramming occur in the same workstation or PROM-
programmer socket
Diagnostics performed at subassembly or final as-
sembly stages often require the socketing of
EPROMs Socketed test codes are ultimately re-
placed with EPROMs containing the final program
With electrical chip-erasure and reprogramming the
28F010 is soldered to the circuit board Test codes
are programmed into the 28F010 as it resides on the
circuit board Ultimately the final code can be down-
loaded to the device The 28F010’s in-circuit altera-
bility eliminates unnecessary handling and less-reli-
able socketed connections while adding greater
test flexibility
Material and labor costs associated with code
changes increase at higher levels of system integra-
tion the most costly being code updates after sale
Code ‘‘bugs’’ or the desire to augment system func-
tionality prompt after-sale code updates Field revi-
sions to EPROM-based code require the removal of
EPROM components or entire boards
4
A28F010
290266 –4
Figure 3 28F010 in a 80C186 System
PRINCIPLES OF OPERATION
Flash-memory augments EPROM functionality with
in-circuit electrical erasure and reprogramming The
28F010 introduces a command register to manage
this new functionality The command register allows
for 100% TTL-level control inputs fixed power sup-
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