and bit rate are set at the factory to fit the needs of
particular applications.
The MCRF202 is available in die, wafer, PDIP and
SOIC packages. The encoding, modulation, bit rate
options, and data fields are specified by the customer
and programmed by Microchip Technology Inc. prior to
shipment. See Technical Bulletin TB023 for more
information on factory serialization (SQTP™).
•
•
Applications
• Insect control
• Industrial tagging
RF
Signal
Reader
Data
MCRF202
External
Sensor
Switch
2003 Microchip Technology Inc.
DS21308E-page 1
MCRF202
Block Diagram
Sensor
Input
Modulation
Control Logic
Inverter
Data
V
A
External Coil
and Capacitor
Connections
V
B
Clock
Generator
Mod Rectifier and V
CC
Circuit AC Clamp
V
SS
Power-On
Reset
Reset
12-bit
Configuration
Register
Row
Decode
Baud
Rate
Timing
Counter
128-bit
EEPROM
Memory Array
Column
Decode
DS21308E-page 2
2003 Microchip Technology Inc.
MCRF202
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
Storage temperature ..............................................................................................................................- 65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
Maximum current into coil pads ..............................................................................................................................50 mA
†
NOTICE:
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
AC AND DC CHARACTERISTICS
All parameters apply across the
specified operating ranges
Industrial (I): T
A
= -40°C to +85°C
unless otherwise noted.
Parameter
Clock frequency
Data retention
Coil current (Dynamic)
Operating current with no V
CC
load
Operating current with V
CC
load
I
CD
I
DD
I
DL
Sym
F
CLK
Min
100
200
—
—
—
Typ
—
—
50
5
10
Max
400
—
—
—
—
Units
kHz
Years
µA
µA
µA
V
CC
= 2V
No load to V
CC
pad
V
CC
= 2V
V
CC
load through switch
to sensor
25°C
Conditions
Turn-on-voltage (Dynamic) for
modulation
Input Capacitance
SENSOR pull-down
SENSOR trigger threshold
V
A
V
B
V
CC
C
IN
R
S
V
S
10
2
—
400
0.5
—
—
2
800
1.0
—
—
—
1200
1.5
V
PP
V
DC
pF
kΩ
V
Between V
A
and V
B
2003 Microchip Technology Inc.
DS21308E-page 3
MCRF202
2.0
FUNCTIONAL DESCRIPTION
2.1.3
V
CC
REGULATOR
The device contains three major building blocks. They
are RF front-end and sensor input, configuration and
control logic, and memory sections. The Block Diagram
is shown on page 1.
The device generates a DC supply voltage from the
unregulated coil voltage. The Vcc pin can be used to
power a separate low-current device (read range will
be affected).
2.1
RF Front-End and Sensor Input
2.1.4
CLOCK GENERATOR
The RF front-end of the device includes circuits for
rectification of the carrier, V
DD
(operating voltage), and
high-voltage clamping to prevent excessive voltage
from being applied to the device. This section also
generates a system clock from the incoming carrier
signal and modulates the carrier signal to transmit data
to the reader.
This circuit generates a clock based on the carrier
frequency from the reader. This clock is used to derive
all timing in the MCRF202, including the baud rate and
modulation rate.
2.1.5
POWER-ON RESET
2.1.1
RECTIFIER – AC CLAMP
This circuit generates a Power-on Reset when the tag
first enters the interrogator field. The Reset releases
when sufficient power has developed on the V
DD
regulator to allow correct operation.
The AC voltage generated by the external tuned LC
circuit is full wave rectified. This unregulated voltage is
used as the maximum DC supply voltage for the rest of
the device and for the V
CC
supply to the external
sensor or switch. Any excessive voltage on the tuned
circuit is clamped by the internal circuitry to a safe level
to prevent damage to the IC.
2.1.6
SENSOR INPUT AND DATA
INVERTER
2.1.2
MODULATION CIRCUIT
The SENSOR input responds to logic high or logic low
voltages to drive the internal inverter on or off. A logic
high results in normal tag operation; a logic low at
SENSOR input activates an inverter, which inverts the
entire data stream prior to modulation.
The SENSOR input has an internal pull-down resistor
of 800 kΩ
(typical).
See Figure 2-4 for application
details.
The MCRF202 sends the encoded data to the reader
by AM-modulating the coil voltage across the tuned LC
circuit. A modulation transistor is placed between the
antenna coil pads (V
A
and V
B
). The transistor turns on
and off based on the modulation signal. As a result, the
amplitude of the antenna coil voltage varies with the
modulation signal. See Figure 2-1 for details.
FIGURE 2-1:
MODULATION SIGNAL AND MODULATED SIGNAL
MCRF202
V
A
Mod.
Signal
L
C
Mod. TR
V
B
Amplitude
Modulation Signal
Modulated Signal
(across V
A
and V
B
)
t
DS21308E-page 4
2003 Microchip Technology Inc.
MCRF202
2.2
Configuration Register and
Control Logic
2.2.3
MODULATION OPTION
CB8 and CB9 determine the modulation protocol of the
encoded data. The available choices are:
•
•
•
•
ASK
FSK
PSK_1
PSK_2
The configuration register determines the operational
parameters of the device. It directly controls logic
blocks which generate the baud rate, memory size,
encoded data, modulation protocol, etc. CB11 is
always a zero. Once the array is successfully pro-
grammed at the factory, the lock bit CB12 is set. When
the lock bit is set, programming and erasing the device
becomes permanently disabled. Table 2-1 contains a
description of the control register bit functions.
When ASK (direct) option is chosen, the encoded data
is fed into the modulation transistor without change.
When FSK option is chosen, the encoded data is rep-
resented by:
a)
Sets of 10 RF carrier cycles (first 5 cycles
→
higher amplitude, the last 5 cycles
→
lower
amplitude) for logic “high” level.
Sets of 8 RF carrier cycles (first 4 cycles
→
higher amplitude, the last 4 cycles
→
lower
amplitude) for logic “low” level.
4 sets of 10 RF carrier cycles for data ‘1’.
5 sets of 8 RF carrier cycles for data ‘0’.
2.2.1
BAUD RATE TIMING OPTION
The chip will access data at a baud rate determined by
bits CB2, CB3, and CB4 of the configuration register.
For example, MOD32 (CB2 =
0,
CB3 =
1,
CB4 =
1)
has
32 RF cycles per bit. This gives the data rate of 4 kHz
for the RF carrier frequency of 128 kHz.
b)
2.2.2
DATA ENCODING OPTION
For example, FSK signal for MOD40 is represented:
a)
b)
This logic acts upon the serial data being read from the
EEPROM. The logic encodes the data according to the
configuration bits CB6 and CB7. CB6 and CB7 deter-
mine the data encoding method. The available choices
are:
•
•
•
•
Non-return to zero-level (NRZ_L)
Biphase_S (Differential)
Biphase_L (Manchester)
Inverted Manchester
Refer to Figure 2-2 for the FSK signal with MOD40
option.
The PSK_1 represents change in the phase of the
modulation signal at the change of the encoded data.
For example, the phase changes when the encoded
data is changed from ‘1’ to ‘0’, or from ‘0’ to ‘1’.
The PSK_2 represents change in the phase at the
change on ‘1’. For example, the phase changes when
the encoded data is changed from ‘0’ to ‘1’, or from ‘1’
to ‘1’.
FIGURE 2-2:
ENCODED DATA AND FSK OUTPUT SIGNAL FOR MOD40 OPTION
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