EEWORLDEEWORLDEEWORLD

Part Number

Search

1206J0250334MXR

Description
Ceramic Capacitor, Multilayer, Ceramic, 25V, 20% +Tol, 20% -Tol, X7R, 15% TC, 0.33uF, Surface Mount, 1206, CHIP, ROHS COMPLIANT
CategoryPassive components    capacitor   
File Size6MB,102 Pages
ManufacturerSyfer
Environmental Compliance
Download Datasheet Parametric View All

1206J0250334MXR Overview

Ceramic Capacitor, Multilayer, Ceramic, 25V, 20% +Tol, 20% -Tol, X7R, 15% TC, 0.33uF, Surface Mount, 1206, CHIP, ROHS COMPLIANT

1206J0250334MXR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSyfer
package instructionCHIP
Reach Compliance Codecompliant
ECCN codeEAR99
capacitance0.33 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
high1.6 mm
JESD-609 codee3
length3.2 mm
Installation featuresSURFACE MOUNT
multi-layerYes
negative tolerance20%
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package formSMT
method of packingTR, Embossed Plastic, 13 Inch
positive tolerance20%
Rated (DC) voltage (URdc)25 V
size code1206
surface mountYES
Temperature characteristic codeX7R
Temperature Coefficient15% ppm/°C
Terminal surfaceMatte Tin (Sn) - with Nickel (Ni) barrier
Terminal shapeWRAPAROUND
width1.6 mm
Base Number Matches1
MLC
Capacitors
Is this the worst impedance processing you have ever encountered?
Author: Mr. Huang Gang of Yibo Technology Expressway This case is a high-speed custom fixture for a PCIE connector that we designed with a customer. We were responsible for the design and simulation, ...
yvonneGan PCB Design
PCB panelization
The so-called jigsaw puzzle, as the name suggests, is to put several boards together. There are two main points here: 1. Because some PCBs are too small, it is inconvenient to produce, it takes a lot ...
qwqwqw2088 PCB Design
RPG game ported using RP2040 and MicroPython
RPG game ported using RP2040 and MicroPython...
dcexpert MicroPython Open Source section
For large project files containing nios, timing constraints, and layout and routing, modify the internal module names and some variable names.
I modified the internal module names and some variable names of a large project file containing nios, timing constraints, and layout and routing. After compiling and synthesizing, a lot of problems oc...
FPGA菜鸡 EE_FPGA Learning Park
Detailed description of I2C bus protocol and timing, getting started is no longer difficult
In life, we often encounter power failures in devices, such as mobile phones, smart bracelets, computers, etc. However, the stored information will not be lost, such as phone numbers, text messages, n...
可乐zzZ MCU
Send a WDS configuration software for SI4463
Send a SI4463 WDS configuration software (since the file is larger than 15M, it needs to be divided into 3 packages)...
gdgn526345 RF/Wirelessly

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号