dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X, and
PIC24EPXXXGP/MC20X
16-bit Microcontrollers and Digital Signal Controllers (up to 256 KB Flash
and 32 KB SRAM) with High-Speed PWM, Op amps, and Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
•
3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
Timers/Output Compare/Input Capture
• 12 general purpose timers:
- Five 16-bit and up to two 32-bit timers/counters
- Four OC modules configurable as timers/counters
- PTG module with two configurable timers/counters
- 32-bit Quadrature Encoder Interface (QEI) module
configurable as a timer/counter
• Four IC modules
• Peripheral Pin Select (PPS) to allow function remap
• Peripheral Trigger Generator (PTG) for scheduling
complex sequences
Core: 16-bit dsPIC33E/PIC24E CPU
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Code-efficient (C and Assembly) architecture
Two 40-bit wide accumulators
Single-cycle (MAC/MPY) with dual data fetch
Single-cycle mixed-sign MUL plus hardware divide
32-bit multiply support
0.9% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast wake-up and start-up
Low-power management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
0.6 mA/MHz dynamic current (typical)
30 µA I
PD
current (typical)
Clock Management
Communication Interfaces
• Two UART modules (17.5 Mbps)
- With support for LIN 2.0 protocols and IrDA
®
• Two 4-wire SPI modules (15 Mbps)
• ECAN™ module (1 Mbaud) CAN 2.0B support
• Two I
2
C™ modules (up to 1 Mbaud) with SMBus
support
• PPS to allow function remap
• Programmable Cyclic Redundancy Check (CRC)
Power Management
Direct Memory Access (DMA)
• 4-channel DMA with user-selectable priority arbitration
• UART, SPI, ADC, ECAN, IC, OC, and Timers
High-Speed PWM
Up to three PWM pairs with independent timing
Dead time for rising and falling edges
7.14 ns PWM resolution
PWM support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault inputs
• Flexible trigger configurations for ADC conversions
Input/Output
• Sink/Source 15 mA or 10 mA, pin-specific for
standard VOH/VOL, up to 22 or 14 mA, respectively
for non-standard VOH1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• Up to 5 mA overvoltage clamp current
• External interrupts on all I/O pins
Advanced Analog Features
• ADC module:
- Configurable as 10-bit, 1.1 Msps with four S&H or
12-bit, 500 ksps with one S&H
- Six analog inputs on 28-pin devices and up to 16
analog inputs on 64-pin devices
• Flexible and independent ADC trigger sources
• Up to three Op amp/Comparators with direct connection
to the ADC module:
- Additional dedicated comparator
- Programmable references with 32 voltage points
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1 -40ºC to +125ºC) planned
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
•
•
•
•
In-circuit and in-application programming
Two program and two complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Trace and run-time watch
Packages
Type
SPDIP
SOIC
SSOP
Pin Count
28
28
28
I/O Pins
21
21
21
Contact Lead/Pitch
.100''
1.27
0.65
Dimensions
1.365x.240x.120” 17.9x7.50x2.05 10.50x7.80x2
Note:
All dimensions are in millimeters (mm) unless specified.
QFN-S
28
21
0.65
6x6x0.9
QFN
44
64
35
53
0.65
0.50
8x8x0.9 9x9x.9
VTLA
36
25
44
35
44
35
TQFP
64
53
0.50
5x5x0.5 6x6x0.5
0.50
10x10x1
2011 Microchip Technology Inc.
Preliminary
DS70657C-page 1
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X, AND
PIC24EPXXXGP/MC20X PRODUCT
FAMILIES
The device names, pin counts, memory sizes, and
peripheral availability of each device are listed in
Table 1
(General Purpose Families) and
Table 2
(Motor
Control Families). Their pinout diagrams appear on the
following pages.
TABLE 1:
dsPIC33EPXXXGP50X and PIC24EPXXXGP20X GENERAL PURPOSE FAMILIES
Program Flash Memory (Kbytes)
Page Erase Size (Instructions)
10-bit/12-bit ADC (Channels)
Remappable Peripherals
External Interrupts
(3)
ECAN™ Technology
16-bit/32-bit Timer
Op amp/Comparator
Output Compare
Analog Comparator
Input Capture
CRC Generator
RAM (Kbyte)
Device
PIC24EP32GP202
PIC24EP64GP202
PIC24EP128GP202
PIC24EP256GP202
PIC24EP32GP203
PIC24EP64GP203
PIC24EP32GP204
PIC24EP64GP204
PIC24EP128GP204
PIC24EP256GP204
PIC24EP64GP206
PIC24EP128GP206
PIC24EP256GP206
dsPIC33EP32GP502
dsPIC33EP64GP502
dsPIC33EP128GP502
dsPIC33EP256GP502
dsPIC33EP32GP503
dsPIC33EP64GP503
dsPIC33EP32GP504
dsPIC33EP64GP504
dsPIC33EP128GP504
dsPIC33EP256GP504
dsPIC33EP64GP506
dsPIC33EP128GP506
dsPIC33EP256GP506
Note
1:
2:
3:
512
1024
1024
1024
512
1024
512
1024
1024
1024
1024
1024
1024
512
1024
1024
1024
512
1024
512
1024
1024
1024
1024
1024
1024
32
64
128
256
32
64
32
64
128
256
64
128
256
32
64
128
256
32
64
32
64
128
256
64
128
256
4
8
16
32
4
8
4
8
16
32
8
16
32
4
8
16
32
4
8
4
8
16
32
8
16
32
5
4
4
2
2
1
3
2
1
16
1
3
Yes
Yes
53
64
5
4
4
2
2
1
3
2
1
9
1
3
Yes
Yes
35
44
5
4
4
2
2
1
3
2
1
8
1
3
Yes
Yes
25
36
5
4
4
2
2
1
3
2
1
6
1
(1)
2
Yes
Yes
21
28
5
4
4
2
2
—
3
2
1
16
1
3
Yes
Yes
53
64
5
4
4
2
2
—
3
2
1
9
1
3
Yes
Yes
35
44
5
4
4
2
2
—
3
2
1
8
1
3
Yes
Yes
25
36
5
4
4
2
2
—
3
2
1
6
1
(1)
2
Yes
Yes
21
28
SPDIP,
SOIC,
SSOP,
QFN-S
VTLA
VTLA,
TQFP,
QFN
TQFP,
QFN
SPDIP,
SOIC,
SSOP,
QFN-S
VTLA
VTLA,
TQFP,
QFN
TQFP,
QFN
On 28-pin devices, Comparator 4 does not have external connections. Refer to
Section 25.0 “Op amp/Comparator Module”
for details.
Only SPI2 is remappable.
INT0 is not remappable.
DS70657C-page 2
Preliminary
2011 Microchip Technology Inc.
Packages
I/O Pins
CTMU
I
2
C™
UART
SPI
(2)
Pins
PTG
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
Pin Diagrams
28-Pin SPDIP/SOIC/SSOP
= Pins are up to 5V tolerant
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
V
SS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
RP36/RB4
CV
REF2O
/RP20/T1CK/RA4
V
DD
PGED2/ASDA2/RP37/RB5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
AV
DD
AV
SS
RPI47/T5CK/RB15
RPI46/T3CK/RB14
RPI45/CTPLS/RB13
RPI44/RB12
TDI/RP43/RB11
TDO/RP42/RB10
V
CAP
V
SS
TMS/ASDA1/SDI1/RP41/RB9
TCK/CV
REF1O
/ASCL1/SDO1/RP40/T4CK/RB8
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
dsPIC33EPXXXGP502
PIC24EPXXXGP202
24
23
22
21
20
19
18
17
16
15
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF
-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF
+/AN3/OA1OUT/RPI33/CTED1/RB1
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
V
SS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
FLT32/RP36/RB4
CV
REF2O
/RP20/T1CK/RA4
V
DD
PGED2/ASDA2/RP37/RB5
1
2
3
28
27
26
AV
DD
AV
SS
RPI47/PWM1L/T5CK/RB15
RPI46/PWM1H/T3CK/RB14
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
TDI/RP43/PWM3L/RB11
TDO/RP42/PWM3H/RB10
V
CAP
V
SS
TMS/ASDA1/SDI1/RP41/RB9
TCK/CV
REF1O
/ASCL1/SDO1/RP40/T4CK/RB8
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
5
6
7
8
9
10
11
12
13
14
dsPIC33EPXXXMC202/502
PIC24EPXXXMC202
4
25
24
23
22
21
20
19
18
17
16
15
Note 1:
The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See
Section 11.4
“Peripheral Pin Select”
for available peripherals and for information on limitations.
2:
Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See
Section 11.0
“I/O Ports”
for more information.
DS70657C-page 4
Preliminary
2011 Microchip Technology Inc.
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