EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

68416-108

Description
Headers u0026 Wire Housings BRKAWY HDR
CategoryThe connector   
File Size668KB,8 Pages
ManufacturerFCI [First Components International]
Download Datasheet Parametric View All

68416-108 Overview

Headers u0026 Wire Housings BRKAWY HDR

68416-108 Parametric

Parameter NameAttribute value
Product CategoryHeaders & Wire Housings
ManufacturerFCI [First Components International]
RoHSDetails
ProductHeaders
TypeUnshrouded
Number of Positions8 Position
Pitch2.54 mm
Number of Rows1 Row
Mounting Style-
Termination StyleThrough Hole
Mounting AngleVertical
Contact GenderPin (Male)
Contact PlatingGold
ComplianceUL
Contact MaterialPhosphor Bronze
Current Rating3 A
Housing MaterialThermoplastic
Insulation Resistance5000 MOhms
Mating Post Length5.84 mm
Factory Pack Quantity1000
Termination Post Length12.27 mm
Voltage Rating1.5 kV
Common power symbols and their meanings
Power symbols, are you still confused? Commonly used power symbols are attached! In circuit design, there are always various power symbols, which often confuse people. Today, the editor has sorted out...
成都亿佰特 Switching Power Supply Study Group
EEWORLD University - Teach you how to learn LittleVGL
Teach you how to learn LittleVGL step by step : https://training.eeworld.com.cn/course/5682LittlevGL is a free and open source graphics library that provides everything you need to create embedded GUI...
桂花蒸 MCU
Altera SoC Architecture Excerpt - Altera SoC FPGA Adaptive Debug.pdf
Altera SoC Architecture Excerpt - Altera SoC FPGA Adaptive Debug...
雷北城 FPGA/CPLD
5. Common Emitter Amplifier Circuit
1. The structure of the triode, the relationship between the currents of each pole of the triode, the characteristic curve, and the amplification conditions. 2. The role of components, the purpose of ...
wang27349715 Analog electronics
CPLD technology and its application.pdf
CPLD technology and its application.pdf...
zxopenljx EE_FPGA Learning Park
FPGA Design and Implementation of HDLC Control Protocol.pdf
FPGA Design and Implementation of HDLC Control Protocol.pdfClear Format...
zxopenljx EE_FPGA Learning Park

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号