Zero adjustment circuit for input terminal of operational amplifier application

Figure (a) is a relatively simple circuit, which uses input resistor R1 and feedback resistor R2 as part of the attenuation network, together with resistor R3 to generate a variable offset voltage at the inverting input. The voltage is divided by R3 and R1||R2. The two ends of potentiometer R4 are connected to a ±15V power supply, and the above voltage division ratio is about 1000/1. That is, an offset voltage range of ±15mV can be obtained. For Figure (a), the general calculation formula for the offset voltage adjustment range is:

Offset voltage range = ±VD [(R1∥R2)/R3] (±VD=±15V)

When there are multiple input signals at the inverting end, as shown by the dotted line in Figure (a), the offset voltage range is:

Multiple input offset voltage range = ±VD[(R1∥R2∥Rl')／R3] (±VD=±l5V)

Comparing the above two formulas, it is obvious that the former has a wider adjustment voltage range. To increase the voltage adjustment range of the latter, the value of resistor R5 can be appropriately changed.

The circuit shown in Figure (b) has a wide range of application value. Because the adjustment voltage is independent of the feedback element, and at the same time, the adjustment voltage is added to the phase input terminal, avoiding the current signal path. In this circuit, the resistance values ​​of R3 and R5 (100kΩ, 100Ω) form a 1000/I voltage divider circuit, and the two ends of R5 will get an offset voltage adjustment range of ±15mV. When R3 and R5 are other values, the offset voltage adjustment range is determined by the following formula:

Offset voltage adjustment range = ±VD·(R5／R3) (±VD=±l5V)

The resistance values ​​of resistors R3 and R5 are not very strict. In fact, it is best to choose R5 below 1kΩ.