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Internal circuit principle of M50197

Source: InternetPublisher:李商隐身 Keywords: Circuit Principle BSP Updated: 2020/03/20

28.M50197’s internal<strong>circuit principle</strong>.gif

M50197 is a new generation of single-chip multi-function digital delay IC launched by Mitsubishi Company. It is more integrated than M50195.
  It has stronger functions and superior performance. The IC contains various processing units required by the digital delay circuit. It does not require external
  memory and comparators, and the delay time ranges from 4-1ms to 163. 8ms is divided into 16 levels. Adjustable. In addition, the integrated circuit is also equipped with a
  surround/delay reverb effect selection terminal MODE. When this terminal is set to high level
, it is in the long delay reverberation state, and when it is set to low level, it is in   the short delay surround state. When pin 8 is set to high level, functions such as delay time can also be controlled by the microcontroller. This IC uses
  SRAM static memory for digital processing. Compared with DRAM dynamic memory for processing, the circuit's signal-to-noise ratio, frequency response,
  distortion and other technical indicators are improved. Its output noise is < - 90dB, the output level reaches 1.4V1, and the high-order harmonic distortion is
  0. 30%. The sampling frequency is up to 500k№, the frequency response can be extended to 10kHz, and the sound quality is excellent.
    M50197 adopts dual in-line 40-pin package structure. The internal principle is shown in Figure 5-28. See the table for pin functions


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