3499 views|1 replies

1782

Posts

0

Resources
The OP
 

Digital to Analog Converter [Copy link]

I recently saw a product description for a low-cost 16-bit, 30 MSPS digital-to-analog converter (DAC). Upon inspection, I found that its differential linearity error (DNL) is only at the 14-bit level, and the settling time to reach a full-scale step of 0?0 25% (12 bits) is 35ns1/28?6MHz. Is this device only at the 14-bit, 28MSPS level at best? If this DAC is only monotonic to 14 bits, then the lowest two bits do not seem to work. Why does this happen? How can I verify that the wiring is correct?

2693.rar

4.62 KB, downloads: 46

This post is from Analog electronics

Latest reply

I can’t watch it!!  Details Published on 2007-1-10 12:22

1

Posts

0

Resources
2
 
I can’t watch it!!
This post is from Analog electronics
 
 

Guess Your Favourite
Find a datasheet?

EEWorld Datasheet Technical Support

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews

Room 1530, Zhongguancun MOOC Times Building, Block B, 18 Zhongguancun Street, Haidian District, Beijing 100190, China Tel:(010)82350740 Postcode:100190

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
快速回复 返回顶部 Return list