A simple automatic on/off circuit design

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A simple automatic on/off circuit design [Copy link]

Author: Chen Jie and Zheng Yuquan, School of Automation and Electrical Engineering, Beijing University of Aeronautics and Astronautics
This article introduces a simple, easy-to-use and reliable on/off circuit. The circuit uses a D flip-flop and cooperates with software processing to realize single-key on/off, automatic saving of important data before shutdown, and automatic shutdown functions.
Keywords : automatic shutdown circuit; microprocessor; CD4013

Introduction
Power saving is the primary factor to be considered in various battery-powered devices. To prevent users from forgetting to shut down, some devices use automatic shutdown circuits. In addition, many devices use an on/off button to control the power on or off. Even if the microprocessor (MPU) is processing critical programs, the system will be shut down when the button is pressed, resulting in the loss of important data. This article uses only a D flip-flop to design a simple, easy-to-use and reliable on/off circuit.

Circuit Design
The actual designed automatic on/off circuit is shown in Figure 1. U1A is a dual D flip-flop CD4013, and the external battery power is input by Vin. The Q output is reversely driven by R5 with a resistance of 472W, R4 with a resistance of 103W, and NPN transistor Q2, and then connected to the switch pin of the switching power supply chip. Taking MAX1626 as an example, when SHDN is high, the power is turned off, and when SHDN is low, the system power is turned on.

The reset button S1 is the system power on/off key. C1 and R2 form an RC network, so that after S1 is pressed, R is guaranteed to be at a high level for a delay time of 12×104×10-3=120ms. The D and CLK terminals of CD4013 are connected to the input power ground to ensure that it is at a low level. One end of the set pin R is connected to the power ground through a 103W resistor, and the other end is connected to the I/O port of the MPU through transistor Q3. The right end of S1 is connected to R1 with a resistance of 103W to control Q1 to turn on. A Zener diode is connected between the collector of Q1 and the ground, and the output of the Zener diode is connected to the I/O port of the MPU.

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Figure 1 Schematic diagram of automatic on/off circuit

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Design PrincipleThe
core device of the on/off circuit is a D-type flip-flop, model CD4013. Its truth table is shown in Table 1. It can be seen from its truth table that no matter what state CLK is in, when S is 0, the output Q is 0; when R is 0, the output Q is 1; and when R and S are both 1, the output Q is 1; when R and S are both 0, as long as CLK does not generate a rising edge pulse, the output Q will maintain the previous output state. This circuit uses the state retention characteristics when R and S are both zero to realize the on/off function.

Since this circuit is at the front end of the on/off power supply, it is in working state regardless of whether the system power is turned on or not when the battery is connected. The input voltage range of CD4013 is 3~15V, so this circuit can ensure stable operation within a wide voltage input range.

System startup principleWhen
the power button S1 is pressed, S is connected to the high level, S=1. According to the truth table, when R=1 and S=1, the output Q should output 1 stably. After the transistor is reversed, the power control pin SHDN is at a low level, turning on the system power. Usually, the MPU will set the I/O pin to a high level when initializing. Due to the delay of the RC network, after S1 is pressed, it can ensure that the S terminal is at a high level for about 120ms (to ensure the stable startup condition: the delay time of the RC network > the time for the system to power on and reset and stabilize the POWER_CTL state to 1). After the transistor Q3 is reversed, S=1, R=0, the Q terminal outputs 1, and the system power is on.

The MPU reads the state of the STATE pin after a delay. If STATE is at a low level at this time, it confirms that Q1 is turned on and S1 has been pressed, confirming that the user's startup program is running normally. If STATE is at a high level at this time, it indicates that Q1 is cut off, the startup signal is a false action, and the program executes the shutdown program.

After the delay time of the RC network, the S terminal changes from 1 to 0. At this time, S=0, R=0. By referring to the truth table, it is found that the output Q should maintain the previous output state, that is, keep the system powered on.

System shutdown principle
As a power-saving product, if the system does not work within the specified time, the system will automatically enter the shutdown program, and automatically shut down the system after saving important data.

When the user manually shuts down and presses S1, Q1 turns on, and the state of STATE changes from high level to low level. After the MPU detects the change in the state of STATE, it will detect the state of STATE again after a delay. If it is still low level, it is confirmed as a shutdown instruction. The program will save important data, turn off all interrupts, and then set the I/O pin POWER_CTL to a low level. The program enters a loop waiting for the shutdown state. At this time, the state of the I/O port is inverted by Q3 to make the trigger R=1, S=0. By referring to the truth table, it can be seen that the Q terminal should stably output 0. After reverse drive by transistor Q2, the power control pin SHDN is high level, and the system power is turned off.

After the power chip is turned off, as the capacitor discharges, the MPU power supply voltage continues to drop, and the pin POWER_CTL becomes indeterminate. However, referring to the truth table, no matter whether the R terminal potential is high or low at this time, the output Q is low, which stably keeps the system in the shutdown state.

As the capacitor continues to discharge, the I/O pin POWER_CTL stabilizes to a low level. At this time, the trigger pin R=1, S=0, and the output Q is stably maintained at a low level to ensure the stable shutdown of the system power supply.

Improvement of the design
In actual use, it was found that when the power supply is replaced, the trigger is initially powered on, and the D, CLK and R terminals are pulled down to the ground, maintaining a stable state of 0. However, due to the charging effect of capacitor C1, it is possible to make S=1. Looking up the truth table, when S=1 and R=1, the output Q is high, causing Q2 to turn on, SHDN to be high, and the system is turned on.

In order to solve the problem that the system may automatically start up when the power supply is replaced, the STATE state is re-read after the system power-on program starts to execute and delays for 500ms. In the initial stage, Q1 is turned on and the STATE state is low. As the delay time of the RC network passes, the potential of the S terminal changes from high to low, Q1 changes from on to off, and the STATE state is converted from low to high again. If the STATE read by the MPU after the delay is high, it is considered to be a false start-up, and the program executes the shutdown program to turn off the system power again. If STATE is still low, it is confirmed to be a power-on instruction and the program executes normally. Therefore, the user is required to press S1 and hold it for more than 500ms when starting up.
The MPU power-on initialization program flow is shown in Figure 2.

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Figure 2 MPU power-on initialization program flow chart

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Conclusion
Compared with other circuits, this circuit has a simple structure and uses fewer components. With software processing, it can realize the automatic on/off function, which is a good choice for general applications.