Design and implementation of a fast and effective broadband power amplifier matching circuit
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Abstract: A fast and effective method is proposedfor the design of LDMOS broadband power amplifier matching circuit usingthe ADS software. The simulation results are: in the frequency range of 1.3 GHz~2.3 GHz, the reflection coefficients of the two ports are less than -25 dB, and the transmission coefficient of the matching network is close to 0 dB. In order to achieve better impedance matching, ADS is used to optimize the matching network so that its impedance value is closer to the actual output impedance value of the power transistor . This method has a good reference rolein the fast and effective design of broadband power amplifier matching circuits.
In addition to the military field, broadband power amplifiers have broad application prospects in wireless communications, mobile phones, satellite communication networks, global positioning systems, live satellite reception, millimeter wave automatic collision avoidance systems, optical transmission systems and other fields.
Compared with other microwave transistors, LDMOS power transistors have better thermal stability, frequency stability, better linearity, larger linear gain, higher efficiency and lower cross-modulation distortion. At the same time, LDMOS is based on mature silicon process devices, and its cost is much lower than other GaAs devices. Therefore, LDMOS is particularly suitable for power amplifiers in base stations of new generation mobile communication systems.
Impedance matching is the key to the design of microwave power transistor amplifiers. A suitable impedance matching network can achieve the best power transfer efficiency within the passband. That is, the input impedance of the transistor amplifier is conjugate matched with the internal resistance of the signal source ; the output impedance of the transistor amplifier is conjugate matched with the load impedance. The output impedance of the previous transistor is conjugate matched with the input impedance of the next transistor.
In the parallel admittance method of impedance matching, the impedance matching achieved is limited to the better matching that can be achieved near the operating frequency. If the operating frequency changes, the input and output impedance (or admittance) of the microwave transistor will change accordingly. Therefore, in order to maintain good conjugate matching within a wider operating frequency band, a multi-section parallel admittance matching method should be used. The process is to draw the admittance values measured by the transistor at different operating frequencies on the admittance circle diagram, and connect the admittance values into a curve in order of frequency from low to high . During the design, multiple parallel admittances are selected according to this curve and connected from different positions to achieve conjugate matching within a wider frequency band.
Assuming that the distance between the parallel admittance multi-access point and the transistor is l, then at different operating frequencies, the number of wavelengths l/λg that the transistor admittance value rotates along the respective equal standing wave coefficient circles to the parallel admittance access point is different l/long < l/λshort. That is, in the entire operating frequency band, the admittance values of each point above the center frequency are greater than the number of wavelengths that the admittance values of each point below the center frequency move along the respective equal standing wave coefficient circles. In this way, when switching from one point on the microstrip line to another point, the trajectory of the change of the admittance value with the wavelength is different from the original. This shows that the trajectory curve of the change of the transistor admittance value in the entire operating frequency band, after accessing a section of microstrip line, obtains different expansions at the high and low ends of the frequency band, thereby allowing the admittance curve to be transformed to the center of the circle diagram, close to the matching point, so as to achieve the purpose of broadband matching.
1 Design ideas
Since the design methods of input and output matching circuits are similar, the output matching circuit design of the LDMOS transistor amplifier MRF281Z is taken as an example. The multi-section parallel admittance matching method is used to obtain the initial value of the broadband impedance matching network, and then the ADS software based on the moment method is combined to optimize the target, thereby quickly and effectively realizing the broadband impedance matching of the transistor amplifier.
2 Load-pull method to obtain output impedance
The principle of the load-pull method is to test the output power of the amplifier by continuously changing the load under the excitation of a large signal level, and then draw equal power and equal gain curves on the Smith impedance circle. In this way, the appropriate output impedance can be selected and the power amplifier can be accurately designed to achieve the required gain and output power.
The optimal load impedance of the transistor MRF281Z at various frequencies from 1.4 GHz to 2.2 GHz is obtained after ADS load pulling and is shown in Table 1.
Table 1 Output impedance of transistor MRF281Z
3 Multi-section impedance matching network design
In order to transmit maximum power to the load or make the microwave circuit system or transmission system in or close to the traveling wave state, a conjugate matching network is required. The matching network has a decisive restriction on the performance indicators of the amplifier such as standing wave ratio, power gain, and output power.
Under the condition of conjugate matching, the maximum transmission power is obtained. Here we take the conjugate impedance Z*out = 7.807-j6.626 of the output impedance Zout = 7.807+j6.626 at frequency f = 1.8 GHz as the impedance of our matching port, and use the conjugate matching method to match the four-section microstrip lines in the Smith circle diagram (as shown in Figures 1 and 2).
Figure 1 Smith chart of impedance matching using multi-section microstrip lines
4. Simulation and Optimization Design Using ADS
The matching circuit obtained above is simulated by ADS, the length and width of each microstrip line are set as variables, and optimized (as shown in Figure 3). The steps are as follows:
Figure 3: Simulating and optimizing the output matching circuit using ADS
( 1) Add OPM controls to the schematic:
First use Random for preliminary optimization, and then use Gradient for local optimization.
( 2) Add optimization target GOAL control:
Here, we first optimize the S parameters of the matching network. The specific S parameter optimization target control configuration table is shown in Table 2.
Table 2 Optimized S parameter target control configuration table
After optimizing the S parameters of the matching network, in order to make the impedance Z in1 of the matching network port 1 basically consistent with the output impedance obtained by the transistor load pull, we further optimize the real part of Z in1. The specific optimization target control configuration table is shown in Table 3.
Table 3 Optimized impedance Z in1 control parameter configuration table
5 ADS simulation results of various indicators
The optimized transistor matching circuit is simulated in ADS for performance parameters such as S parameters and output standing wave ratio. The simulation results are shown in Figures 4, 5 and 6.
Figure 4 S parameter curve of matching network
Figure 5 Port 1 VSWR curve of the matching network
Figure 6: Port 2 VSWR curve of the matching network
The impedance Z in1 of the matching network port 1 is tested using ADS and the impedance value results are shown in Table 4.
Table 4 Impedance values of output matching network
6 Implementation of Matching Network
In practical applications, single-ended unbalanced stubs (open lines, short lines) are often replaced by balanced designs. The circuit form converted from the above circuit is shown in Figure 7.
Figure 7 Balanced design of microwave transistor output matching network
The output matching circuit is converted into a circuit layout as shown in Figure 8.
Figure 8 Microwave transistor output matching network circuit layout design
7 Simulation Results Analysis
From the above simulation results, we know that the impedance matching of the broadband power transistor amplifier output circuit is good. In the frequency range of 1.3 GHz~2.3 GHz, the S21 forward transmission coefficient is close to 0 dB, and the reflection coefficients of S11 and S22, that is, the two ports, are both less than -25 dB. The standing wave ratios of the two ports of the matching network are both less than 1.2, indicating that the forward transmission is large and the reflection is small.
At the same time, the impedance Zin1 of the matching network port 1 is very close to the output impedance value of the transistor load pull, which can better complete the impedance matching. Therefore, the multi-section microstrip line matching method combined with ADS is used to optimize the target, reducing the debugging cost and shortening the cycle, and achieving good results in the realization of the broadband matching network of the transistor.
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