Technical difficulties of RFID tags, chip structure and implementation of security protocols[Copy link]
This post was last edited by Aguilera on 2018-6-23 23:22 (I) Technical Difficulties In high-efficiency logistics, moving object tracking, and vehicle management, RFID tags need to provide higher stability and longer communication distances at a low cost, which requires tags to have higher sensitivity, lower power consumption, and faster reading and writing speeds. In addition, combined with the actual situation of logistics, supply chain, and vehicle management, tags also need to meet the following requirements: 1. Security. As the only identifier of an object, the electronic tag cannot allow illegal readers to obtain or rewrite information by unauthorized or illegal intrusion, ensuring the correctness of the information stored in the electronic tag. 2. Accuracy and speed. For high-speed moving objects, the normal movement of the object does not affect RFID communication. For example, when a vehicle is driving, the speed of a speeding vehicle may exceed 180KM/h, so accurate reading and writing of information are required. 3. Reliability and lifespan. In practical applications, tags are often attached to the outside of objects and face complex environments, such as large changes in ambient temperature or harsh ambient temperature conditions. Therefore, it is necessary to improve the reliability of tags. The continuity of information storage and replacement costs of tags require that the lifespan of tags be as long as possible, preferably reaching or exceeding the target service life. 4. In chip information management, since it is necessary to face different objects, government departments and enterprises have different security requirements and information categories for data collection, so tags must be able to provide independently manageable data partitions to meet the needs of various departments and industries to give full play to the value of tags and reduce comprehensive costs. Based on the above problems, passive RFID tags are widely used in logistics tracking and vehicle management. In addition to meeting the traditional requirements of sensitivity, power consumption, and read and write distance, tags also need to add security modules to address security requirements and securely encrypt information processing. Adding additional security circuits places higher requirements on sensitivity and power consumption. The information transmission between the security module and the digital baseband also puts forward corresponding high requirements for the capacity, storage capacity, storage management, read and write times and speed of information storage. In combination with practical applications, it is also necessary to improve the adaptability of the tag to the environment, increase the life of the tag, and reduce the maintenance cost of the tag. (II) Chip structure The passive RFI tag chip includes a radio frequency front end, an analog front end, a digital baseband, a non-volatile memory, a random number generator and a security module. The specific framework structure is shown in Figure 2. The radio frequency front end consists of three parts: a rectifier circuit, a demodulation circuit and a modulation circuit. The rectifier circuit is responsible for collecting the 900MHz radio frequency energy transmitted in the space, and converting the AC energy into DC energy to provide power for the entire chip; the demodulation circuit is responsible for converting the signal up-converted to the radio frequency signal into a baseband signal and transmitting it to the digital baseband; the modulation circuit is responsible for receiving the digital baseband signal, modulating it on the 900MHz carrier and backscattering it back to the reader. The analog front end is mainly responsible for providing the global clock, bias current, and power-on and power-off reset signals. The random number generator is responsible for providing 16-bit and 32-bit true random numbers for the security module and digital baseband. The non-volatile memory is responsible for storing all data that the chip needs to save in the event of a power failure. For authentication information and keywords, only authorized readers are allowed to obtain and rewrite. The digital baseband is responsible for processing instructions and state machine jumps, memory read and write access based on the communication protocol, and providing a security module interface. The security module acts as an encryption engine, providing encryption and decryption operations.