Summary of power supply problems developed by Daniel over the years (benefited a lot)[Copy link]
Question 1: Why do we often choose 65K or 100K (near these frequency bands) as the switching frequency for the flyback power supply that we use most for low power? What are the reasons for this? Or in what cases can we increase the switching frequency? Or reduce the switching frequency? Why do switching power supplies often choose a range of around 65K or 100K as the switching frequency? Some people would say that IC manufacturers all produce such ICs, and of course there are reasons for this. What does the switching frequency of each power supply determine? We should think about the reasons from here. Some people will also say that EMC is not easy to pass when the frequency is high. Generally speaking, this is true, but this is not inevitable. EMC is related to frequency, but it is not inevitable. Imagine that our power supply switching frequency has increased, what is the direct impact? Of course, the MOS switch loss increases, because the number of switches per unit time increases. What will happen if the frequency is reduced? The switching loss is reduced, but the energy provided by our energy storage device in a single cycle will increase, which will inevitably require a larger transformer magnetism and a larger energy storage inductor. Selecting around 65K to 100K is a more appropriate empirical compromise, and the power supply is a compromise between the rationalization and compromise. If in special circumstances, the input voltage is relatively low, the switching loss is already very small, and we don’t care about this switching loss, then we can increase the switching frequency to reduce the size of the magnetic device. The key to this post: How to choose the switching frequency of the appropriate IC? Why is the switching frequency of the mainstream IC roughly in this range? What is the switching frequency related to? It is about the general situation, not to go into a dead end. Many ICs have different frequencies. I want to diverge everyone’s thinking to pay attention to these problems! The general situation I want to talk about here is mainly what the switching frequency is related to, how to choose the appropriate switching frequency, why there are so many mainstream ICs and switching frequencies, please note that it is not a certainty, it is a general situation, so that the novice area can understand the general behavior. Of course, the switching power supply can be used in any way you want, as long as it can be used reasonably. 1. How do you know that 65 or 100KHZ is generally selected as the switching frequency of the switching power supply? (Investigating the mainstream ICs of common large manufacturers, these two will be more common, of course there are some around this, and some have adjustable switching frequencies) 2. How do you find out that the switching frequency of the switching power supply is indeed working at 65KHZ or 100KHZ at work? (From a design perspective, most power supplies use this range) 3. Are there more than two pictures of testing 65KHZ100KHZ frequencies? (More than two pictures, meaningless) 4. Do you know that switching power supplies can work at 1.5HZ? (You think it is necessary to talk about this. There is nothing wrong with work. You are just nitpicking. When you are a technician, remember not to nitpick. Then can you talk about why most power supplies do not work at 1.5HZ? It is meaningful to say this. It is meaningless for you to make a 1.5HZ power supply) Reminder: Technicians should remember not to nitpick. We are not campus researchers. We need to combine theory with practice. Only meaningful products can be made!
Question 2: Why do we often design the switching frequency in zone 2 in LLC? Why not zone 1 and zone 3? What are the restrictive factors? Or what are the consequences if zone 1 and zone 3 are selected as the switching frequency? The principle of LLC is to adjust the output voltage by using the increase of inductive reactance of inductive load with the increase of switching frequency, which is PFM modulation. And the turn-on loss of MOS tube ZVS is smaller than ZCS. Zone 1 is a capacitive load zone, which is naturally undesirable. Then in zone 3, the switching frequency is greater than the resonant frequency, which is still an inductive load zone. In theory, there is no problem for MOS to achieve ZVS, and it is indeed so. But we cannot ignore the turn-off of the output diode on the secondary side. That is, when the primary MOS tube is turned off, the resonant current does not decrease to the same level as the excitation current, and the secondary rectifier diode is softly turned off. This is also the reason why we usually do not choose the third zone. We cannot just design according to the experience of our predecessors, but we must know that there is a reason for this design!
Question 3: What will happen when the duty cycle of our flyback is greater than 50%? What are the good aspects? What are the bad aspects? What does it mean when the duty cycle of the flyback is greater than 50%, and what factors does the duty cycle affect? First: If the duty cycle is designed to be too large, the first thing that will result is an increase in the turns ratio, and the stress of the main MOS tube will inevitably increase. Generally, MOS tubes below 600V or 650V are selected for flyback, considering the cost. A duty cycle that is too large is bound to be unbearable. Second point: It is very important that many people know that slope compensation is needed, otherwise the loop will oscillate. However, this is also conditional. The generation of the right plane zero point requires working in CCM mode. If it is designed in DCM mode, this problem will not exist. This is also one of the reasons why low power is designed in DCM mode. Of course, we can overcome this problem by designing a good enough loop compensation. Of course, in special cases, it is also necessary to design the duty cycle to be greater than 50%. The energy transferred per unit cycle increases, which can reduce the switching frequency and achieve the purpose of improving efficiency. If the flyback is to increase efficiency, this method can be considered.
Question 4: If the flyback power supply is to achieve a certain efficiency, what aspects should be taken into consideration? Quasi-resonance? Synchronous rectification? A major disadvantage of flyback is the efficiency problem. What ways can be considered to improve efficiency? Reducing losses is inevitable. The loss points are the switch tube, transformer, and output rectifier tube, which are the three main parts. Switch tube We know that flyback is mainly hard switching of PWM modulation. Switching loss is a major difficulty for us. Fortunately, the emergence of soft switching has seen hope. Flyback cannot achieve full resonance like LLC, so it can only develop towards quasi-resonance (resonance in part of the time period). There are also many such ICs on the market. Our company uses NCP1207 more. After the MOS tube is turned off, the first foot before the next opening detects that the VCC voltage passes through zero, and then opens the next cycle after a set time. How to minimize the loss of the transformer, the perfect use of the transformer will be involved in the following questions. Synchronous rectification generally outputs large currents, and the secondary side rectifier diodes will still have large losses even if Schottky diodes are used. At this time, synchronous rectification MOS is used to replace Schottky diodes. Some people will say that this is too costly and it is better to use LLC or forward. Of course, there is no best, only more suitable.
Question 5: How is the conduction of power supply formed? What are the conduction paths? Commonly used methods? What factors affect the radiation of power supply? How to do high-power EMC. The power supply conduction measurement method is to receive the high-frequency interference (generally 150K to 30M) from the inside of the power supply at the input ports L, N, PE. To solve the conduction problem, we must figure out which paths are used to reduce the interference received at the port.
As shown in the figure: There are generally two modes: L, N differential mode components, and common mode components through the PE ground loop. Some frequencies are both differential and common mode. Through filtering: Generally, secondary common mode is used with Y capacitors to filter out. The selection method and skills are also very important, and the layout has a great impact. Generally, a low U inductor is placed near the port, preferably nickel-zinc material, specifically for high frequency, and the winding method uses double wires in parallel to reduce the differential mode component. The post-stage generally places a larger inductance, around 4MH to 10MH, which is just an empirical value, and it needs to be matched with the Y capacitor. The X capacitor also needs to be close to the port to filter the differential mode, and is generally placed in the middle of the secondary common mode. Place the Y capacitor, and the wiring needs to be thickened when the capacitor is laid out, and it cannot be plugged in, otherwise the effect is very poor. (These are just a fuss on the input filter network) Of course, you can also start from the source. Conduction is the result of radiation coupling into the line. Reducing the switch radiation can also bring benefits to conduction. Several places that affect radiation generally include the MOS tube opening speed, the rectifier tube conduction and shutdown, the transformer, and the PFC inductor, etc. The design of these circuits needs to compromise with other aspects and will not be elaborated. Some experience and skills: For high-power EMC, it is generally necessary to increase shielding, which is effective immediately. There are generally several options for shielding locations: First: Shielding between the input EMI circuit and the switch tube. This has a great effect on EMC. Many filters are ineffective and this method is generally very effective. Second: Shielding of the primary and secondary of the transformer. Generally, if there is space for the transformer design, it is best to add shielding. Third: The location of the radiator can serve as a good shield. Reasonable layout and utilization of the board and the selection of radiator grounding are also very important. Fourth: To determine the location of the radiation source, there are generally a few simple methods, which may not be completely accurate. For reference, if the input line magnetic ring is good for EMC, it is generally the primary MOS tube. If the output line magnetic ring is effective for EMC, it is generally the secondary output rectifier tube, especially the high frequency greater than 100M. You can consider adding capacitors or common-mode inductors to the output. Of course, there are many other details and techniques, especially in terms of layout loops. LAYOUT will be explained separately later.
Question 7: When considering the cost of power supply, where should we start? When designing power supply, cost evaluation is essential. At present, customers have pushed the cost of power supply very low. All major competitors are engaged in price wars. Everyone can make power supply. It depends on who can make it cheaper to win the order. From which aspects can we start to benefit Chen Ben: First: technical indicators. The higher the technical indicators of power supply, the higher the cost. If your power supply cost is high, then you can sell your performance indicators. With more performance requirements and more circuits, the cost will naturally be higher. It is also the capital for talking with customers. Second: material procurement cost. Why do large companies have high profits in power supply? It is nothing more than that they have a superior procurement platform, large procurement volume, low material cost, and of course lower cost. If purchasing is not considered, as an engineer, you must figure out the costs of different materials, such as using SMDs instead of plug-ins (for example, plug-in resistors are more expensive than SMDs), using domestic products instead of Taiwanese products, and using Taiwanese products instead of Japanese products. The price difference here is quite large. (For example, Japanese capacitors are several times more expensive than domestic capacitors!!! Of course, there are also differences in quality;) Third: important components that affect cost: transformers, inductors, MOS tubes, capacitors, optocouplers, diodes and other semiconductor devices, ICs, etc. The prices of transformers wound by different transformer manufacturers vary greatly. MOS tube stress, thermal resistance selection is sufficient, the cost of IC solutions, etc. Other aspects lead to cost issues: device heat sinks, the size is appropriate, and more is a waste of money. PCB layout, using a single-sided board as a double-sided board is a waste of money. PCB layout technology, choosing a reasonable process has low processing cost and high production efficiency.
Question 8: Power supply loop design, which parts of the power supply affect the power supply loop? What indicators determine a good loop? Power supply loop design has always been a difficult point. Why do I say that? Because there are too many major influencing factors, it is difficult to achieve accurate theoretical calculations, and simulation is also based on idealized models. Here we only talk about some influencing factors of loop design, and understand the loop from a qualitative perspective and how to do loop compensation. The loop is based on the need for feedback when the input and output fluctuate. The loop will correspondingly inform the control IC to adjust and maintain the stability of the output. The power supply loop is generally series negative feedback, some are voltage series negative feedback (under CC mode), and some are current series negative feedback (under CV mode). So what are the places that affect the loop? Zeros and poles in the circuit. Zeros generally cause the gain to increase, causing a 90-degree phase shift (a zero in the right half plane will cause a -90-degree phase shift). Poles generally cause the gain to decrease, causing a -90-degree phase shift, and poles in the left half plane will cause system oscillation. Therefore, we need to use zero-pole compensation to reasonably regulate our loop. For the low-frequency part, zero compensation is generally introduced to meet sufficient gain, and pole compensation is generally introduced to offset high-frequency interference to reduce high-frequency interference. The principle of loop stability is: 1. At the crossover frequency (that is, the frequency when the gain is zero dB), the system's phase margin is greater than 45 degrees. 2. When the phase reaches -180 degrees, the gain margin is greater than -12dB.3. Avoid entering the crossover frequency too quickly. The slope of the curve near the crossover frequency is -1. For general flyback circuits: 1. The output filter capacitor that generates zero points can increase the loop gain. (Generally around the intermediate frequency of 4K, it is good for the gain and does not require compensation) 2. If working in CCM mode, right half plane zero points will also be generated. In the high frequency band, pole compensation can be used. This is generally difficult to compensate, so try to avoid it and make the crossover frequency less than the right half plane zero frequency (about 15K, which will change with the load). Select 3. The load will generate low-frequency poles. Use low-frequency zero points to compensate. 4. The LC filter will generate low-frequency poles, which require zero point compensation. It is important to know which zero poles are good or bad and compensate them in a targeted manner. The compensation circuit is relatively simple for the power supply loop. Generally, type 2 compensation is used for the op amp. Some also use type 3 compensation, which is rarely used.
Question 10: What kind of transformer is the most perfect and applicable? What does the transformer determine and what does it affect? Designing a transformer is one of the core points of various topologies. The quality of transformer design affects all aspects of the power supply. Some transformers cannot work, some are inefficient, some are difficult to do EMC, some have high temperature rise, some will saturate in extreme cases, and some cannot pass safety regulations. It is necessary to comprehensively consider various factors to design the transformer. Where should we start designing a transformer? Generally speaking, the size of the core is selected according to the power. Experienced people can refer to their own designs. Inexperienced people can only calculate according to the AP algorithm. Of course, a certain margin must be left, and finally the design is tested by experiments. Generally, EE, EF, EI, and ER are recommended for low-power flyback. PQ for medium and high power is more commonly used. There are also individual habits and platform differences between different companies. For high-power flybacks, there is no suitable magnetic core. Two transformers can be connected in series and in parallel on the primary and secondary sides. Different topologies have different requirements for transformers. For example, for flyback, you need to consider what mode you need to work in and how to adjust the inductance appropriately. Especially for multi-channel outputs, you must pay attention to the load adjustment rate to meet the requirements, the coupling effect should be good, such as parallel winding, uniform winding, and as many secondary turns as possible. The voltage resistance of the MOS tube determines the turns ratio, how to select the appropriate duty cycle, and how large the Bmax is (generally less than 0.35, of course 0.3 is better, even if the short circuit is not too serious). Some also need to add shielding to rectify EMC. The primary and secondary shields are generally added with 2 layers, and the outer shield is 1 layer. High-power transformers are generally more concerned about losses. Copper loss and magnetic loss need to be balanced. Air cooling and natural cooling must also be considered. The current density is appropriate. The current density of slightly larger power (greater than 150W) is relatively small (3.5-4.5), and that of smaller power (5.0-7.0). It is also necessary to understand the safety regulations of the power supply, whether the retaining wall is sufficient, and whether the interlayer tape is set reasonably. These cannot be ignored. Once the certification is required, the transformer will be modified, which will affect the progress.
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