TMS320C5402 memory problem

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TMS320C5402 memory problem [Copy link]

      The TMS320C5402 has a total of 192K bytes of addressable storage space. This 192K bytes of storage space is divided into three independent selectable spaces: (1) 64K bytes of program storage space; (2) 64K bytes of data storage space; (3) 64K bytes of I/O space. The TMS320C5402 chip includes three types of on-chip memory: DARAM, SARAM, and ROM. All internal and external program memories and internal and external data memories of the TMS320C5402 are uniformly addressed. The memory configuration structure of the TMS320C5402 is shown in the figure below The memory structure of the TMS320C5402 is related to the setting of the processor working mode status register (PMST). Users can configure the memory space through the three control bits (MP/MC, OVLY, and DROM) in PMST. The program storage space of TMS320C5402 adopts extended paging technology. The entire program storage space (1M bytes/20 address lines) is divided into 16 pages, with a total of 64K bytes per page. TMS320C5402 has 4K bytes of internal ROM. When MP/MC=0, this 4K bytes of ROM is mapped to the address range of F000H-FFFFH in the program space, of which the content in the upper 2K bytes of ROM is customized by TI. This 2K bytes of program space (F800H-FFFFH) contains the following content: (1) Boot program. Automatically load the boot program from the serial port, external memory, I/O port, and host interface. (2) 256 bytes u-law extension table (3) 256 bytes A-law extension table (4) 256 bytes sine function value lookup table (5) Interrupt vector table When the processor is reset, the reset, interrupt, and trap vectors are mapped to FF80H in the program space. After reset, these vectors can be remapped to the beginning of any page of the program memory space. Using this feature, it is easy to move the interrupt vector table from the boot ROM to other storage areas and then remove the ROM from the memory map.