Research on the Interface Technology between MSP430 and I2C Bus

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Research on the Interface Technology between MSP430 and I2C Bus [Copy link]

Introduction

Since the advent of MSP430 microcontroller in 2000, it has been favored by many designers for its complete functions, ultra-low power consumption and easy development. MSP430 is very different from the traditional 51 microcontroller in structure. One of them is: in the peripheral interface circuit of MSP430, there is no hardware circuit to control the read, write and address latch signals of peripherals like 51. In line with this interface circuit, MSP430 prefers to use I2C bus and ISP and other peripheral devices based on serial interface. On the other hand, with the development and maturity of I2C technology, its simple hardware structure, high-speed transmission and rich devices make the application of such devices more and more extensive. Therefore, it is of great significance to study the interface technology between the new microcontroller MSP430 and I2C bus. This paper studies this issue, analyzes and studies the principles and methods of MSP430 and I2C bus interface, proposes an efficient interface method, and introduces the optimized program.

1. MSP430 MCU I/O port control features

Compared with the 8031 MCU, the MSP430 I/O port is much more powerful and its control method is more complex. The MSP430 I/O port can realize bidirectional input and output; complete some special functions such as driving LCD, A/D conversion, capture comparison, etc.; and realize various I/O interrupts. MSP430 uses the traditional 8-bit port method to ensure its compatibility, that is, each I/O port controls 8 I/O pins. In order to realize complex control of each pin of the I/O port, each I/O port in the MSP430 corresponds to a set of 8-bit control registers (as shown in Figure 1). Each bit in the register corresponds to an I/O pin, realizing independent control of the pin. The function and number of registers are determined by the function and type that the I/O port can complete. [2]

Figure 1 is a schematic diagram of the control structure of an I/O port of MSP430. For the most basic I/O port that can only complete input and output functions, there are only 3 control registers. Among them, the input register saves the input status; the output register saves the output status, and the direction register controls the input and output status of the corresponding pin. P6.6 and P6.7 used to implement the I2C bus interface in this article belong to this type of port. In addition, some I/O ports can not only be used as basic input and output, but also can be used for other purposes, such as LCD drive control pins. The control function register of this type of port realizes the switching of the pin function status. Furthermore, there is a type of port that can not only complete the functions of the above two ports, but also realize the interrupt function. This type of port has all the registers in Figure 1, and the interrupt triggering method and interrupt masking can be controlled by the corresponding registers. P2.0 used in this article belongs to this type of port, which is used to receive the interrupt issued by LM92.

Through the above control structure, the I/O port of MSP430 can realize a lot of functions. In addition, some of these I/O ports can also be combined with special modules in MSP430 to complete more complex tasks. For example, serial communication can be realized by combining with the capture comparison module, and A/D conversion can be realized by combining with the A/D module. In addition, the electrical characteristics of the MSP430 I/O port are also very outstanding. Almost all I/O ports have a 20mA driving capacity, and general LEDs and buzzers can be driven directly without auxiliary circuits. Many ports have integrated pull-up resistors to facilitate the interface with peripheral devices.

2 MSP430 and I2C bus device interface

Through the above introduction, we have learned some control features of the I/O port in MSP430. The following describes how to use these features to realize the I2C bus interface. As shown in Figure 2, P6.6 of the 41 series microcontroller is used to generate the timing synchronization signal of the I2C bus; P6.7 is used to complete the serial data input and output of the I2C bus; and P2.0 is used to receive the interrupt signal generated by LM92. Based on the I2C bus specification, by setting different device addresses for A0, A1 of LM92 and A0, A1, A2 of AT240, the two devices can share SCL and SDA.

2.1 I/O port pin control

Unlike 8031, MSP430 has no bit space and no control circuit dedicated to performing bit operations. So how does it control a specific I/O port? Instructions related to bit operations in MSP430 are all implemented through logical operations. [3] For example:

BISB #01000010B,P1OUT; Set P1.6 and P1.1 XORB #01000010B,P1OUT; Logical OR operation

The set instruction BISB in this example is obtained by performing a logical OR operation on the original operand (01000010) and the destination operand (P1OUT). Therefore, this command is equivalent to the instruction in the second line. Although this control method is slightly more complicated than that of 8031, its control capability is enhanced. It is not difficult to see from the example that this method can control multiple port bits at the same time.

2.2 Methods to simplify the I2C interface

As we all know, the implementation of the I2C bus protocol mainly controls SDA and SCL to generate various timing sequences specified by the protocol. To control P6.7 and P6.6 to generate various timings required by the I2C bus, the input, output and direction registers must be used frequently. To reduce the amount of code and simplify interface control, the most direct way is to reduce the number of related register operations. To achieve this idea, it is necessary to combine software and hardware and make full use of the characteristics of the I/O port and the characteristics of the I2C bus protocol.

A careful observation of the basic data operation timing in Figure 3 [1] shows that: first, the I2C bus is in a high-level state when there is no data transmission; second, the SDA pin is the input and output end of the data, and its state change is the most complex. Controlling it requires frequent use of the three registers P6IN, P6OUT, and P6DIR.

R1 and R2 in Figure 2 are pull-up resistors, and their resistance values are determined by the electrical characteristics of the selected I2C bus device. In this article, these two resistors not only play the role of pull-up, but also help solve the first problem. When P6.6 and P6.7 are in the receiving state, the pull-up resistor can pull the level of this point to VCC, thereby ensuring a stable high level when the bus is idle.

Continuing the above ideas, it can be found that when the corresponding bit of the direction register is input, it is equivalent to sending a logic '1' to the I2C slave device. So how to send a logic '0'? This can be achieved by setting the corresponding direction control bit to output, and then setting the corresponding position of the output register to '0'. Furthermore, if the output register is set to '0', only controlling the change of the direction register can send two logic levels. In this way, only the direction register needs to be controlled when sending data. Given the characteristic that SDA needs to frequently switch input and output states, this method can reduce the amount of code by about 15% and make the program clearer. This provides a good solution to the second problem.

3 Implementation of I2C bus control timing

The above describes the most basic operation timing of the I2C bus. Various operations in the I2C bus are completed by a combination of these basic operations. Since the types, functions, and structures of I2C bus devices are different, the specific control timing of each device is different. Figure 4 shows the control timing of AT2402 reading specified byte data. It can be seen from the figure that a read operation uses the basic operations of start, send byte, process response, receive byte, and stop. The code in the appendix implements this timing. There are other control timings for AT2402, such as byte write timing, data page read timing, address read timing, etc. [1]. The code in the appendix writes the basic operations as subroutines. Different functional timings can be implemented by calling subroutines.

LM92 is a high-precision temperature sensor, which is also controlled by I2C bus. Figure 5 shows the timing of the device reading temperature data. Because its function and structure are very different from AT2402, the control timing of the two is not exactly the same. As shown in Figure 4 and Figure 5, although both realize the reading operation, the timing of the two is very different, and the control timing of LM92 is obviously much more complicated. However, a careful analysis shows that these timings are also realized by some basic operation combinations. In this way, the basic operation subroutines required by LM92 can be improved on the basis of the above method, and then the subroutines can be arranged according to the timing requirements to realize various controls of LM92.

In summary, to realize the control timing of the I2C bus, it is necessary to carefully analyze the timing requirements and characteristics of various devices, construct all basic operations, and reasonably arrange the basic operations according to the timing requirements.

4 Conclusion

Using the above design method and circuit, the interface between MSP430 and I2C bus devices is realized, and AT2402 and LM92 are well controlled, achieving the expected goal. Practice has proved that this method is very effective in realizing the control of I2C bus devices, and the program code compiled using this method is small and the execution efficiency is high. This method provides a feasible solution for the interface between MSP430 and I2C bus.