Challenges in Developing and Deploying Power Management

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Challenges in Developing and Deploying Power Management [Copy link]

DPM for embedded Linux is an evolving technology. The core technology is improving thanks to contributions from developers in the global open source community, but practical applications still have to clear a number of roadblocks.
　　Coordinating DPM CPU clocks and voltages across all device subsystems
　　introduces a very flexible set of power management parameters that target one of the major power consuming devices in the device. Other devices (backlight, RF, etc.) also present power management opportunities, but can result in very different types and numbers of operating points. However, it is rare that the various nodes in a system are completely independent. The CPU is connected to buses, bridges, memory, and directly to other peripherals, and changing the clock and voltage of one device may limit its electrical and logical connections to neighboring devices. Options for resolving this incompatibility include:
　　Grouping CPU cores and peripherals into blocks that share operating point characteristics
　　Selecting operating point clock rates that are multiples of each other
　　Using voltage translators/buffers or open collector circuits to reduce voltage differences Overcoming
　　voltage and frequency regulation latency
　　In order to support aggressive power-saving paradigms such as DPM, the system hardware must be able to respond at least as fast as the state changes directed by the DPM strategy occur. In other words, if the DPM system needs to transition from one operating point to another within a given time, the power supply circuitry must be clocked to occur with these changes.
　　In other words, the time it takes to change voltage
　　must be less than the transition time between operating points ( T芕 < T芆P ). To achieve the interframe scheme described above, T芕 must be in the 5 millisecond range (200 Hz). Some DC-to-DC power supplies run internally at around 200 Hz and can only deliver voltage changes within about 200 milliseconds (5 Hz) under load, reducing the usable resolution and utility of DPM-based systems.
　　Real-time Impact
　　Until recently, CPU voltage and frequency scaling posed a serious challenge to real-time performance. Changes in either parameter created instabilities, and the time required to “relock” phase-locked loops and other dynamic clock mechanisms resulted in long wait times (sometimes many milliseconds) during which the CPU could neither perform computational operations nor respond to external events (interrupts).
One reason device manufacturers are turning to Linux is the opportunity to take advantage of standards-based power management rather than current proprietary schemes. The evolving dynamic power management capabilities, along with power profiling techniques such as ARM’s IEM, are providing handset manufacturers and other smart device OEMs with powerful new tools to enhance product differentiation, achieve faster time to market, and meet end-user and carrier technology requirements.