This article briefly describes the power conversion and transmission process in the converter circuit. It aims to solve the problem of voltage and current spikes generated by the switching device MOSFET at the moment of turn-on and turn-off, which in turn generates electromagnetic interference. By comparing the structure and parameters of traditional planar MOSFET and super junction MOSFET, this article seeks the reasons why the use of super junction MOSFET produces worse electromagnetic interference, and conducts analysis and improvement.
With the continuous development of switching power supply technology, power MOSFET is one of the core electronic devices of switching power supply, and switching loss is one of its main losses. Based on the basic idea of saving energy and reducing losses, power MOSFET technology is developing in the direction of increasing switching speed and reducing on-resistance. COOL MOSFET is a new structure power MOSFET with super junction, which has lower on-resistance, faster switching speed and can achieve higher power conversion efficiency. However, the ultra-fast switching performance of super junction MOSFET also brings unnecessary side effects, such as higher voltage and current spikes, poor electromagnetic interference, etc.
The following content takes a flyback converter topology (as shown in Figure 1) as an example to briefly describe the power conversion transmission process of the converter. From the differences in structure and parameters between planar MOSFET and super junction MOSFET, it discusses the generation mechanism of voltage and current spikes, as well as electromagnetic interference. The purpose of reducing electromagnetic interference is achieved by improving and reducing voltage and current spikes through peripheral circuits.
Figure 1 shows the simplest flyback converter topology, and contains the following parasitic elements: primary leakage inductance, parasitic capacitance of MOSFET, and junction capacitance of secondary diode. This topology is derived from a buck-boost converter, replacing the filter inductor with a coupled inductor, such as a magnetic core transformer with an air gap. When the main switching device MOSFET is turned on, energy is stored in the transformer in the form of magnetic flux and transferred to the output when the MOSFET is turned off. Since the transformer needs to store energy during the MOSFET conduction period, the magnetic core should have an air gap. Based on this special power conversion process, the flyback converter can only convert and transfer limited power, which is only suitable for medium and low power applications, such as battery chargers, adapters, and DVD players.
In the normal working condition of the flyback converter, when the MOSFET is turned off, the primary current (id) charges the Coss (i.e. Cgd+Cds) of the MOSFET in a short time. When the voltage Vds across Coss exceeds the sum of the input voltage and the reflected output voltage (Vin+nVo), the secondary diode is turned on, and the voltage across the primary inductor Lp is clamped to nVo. Therefore, resonance occurs between the primary total leakage inductance Lk (i.e. Lkp+n2×Lks) and Coss, generating high-frequency and high-voltage surges. Excessive voltage on the MOSFET may cause failure.
The flyback converter can operate in continuous conduction mode (CCM) (as shown in Figure 2) and discontinuous conduction mode (DCM) (as shown in Figure 3). When operating in CCM mode, the secondary diode remains on until the MOSFET gate is turned on. When the MOSFET is turned on, the reverse recovery current of the secondary diode is added to the primary current, so a large current surge appears on the primary current at the turn-on moment; when operating in DCM mode, since the secondary current dries up before the end of a switching cycle, resonance occurs between Lp and the Coss of the MOSFET.
Figure 4 shows the measured MOSFET voltage and current waveforms when the switching power supply operates in DCM mode. In addition to being able to see that the MOSFET produces relatively large voltage and current changes during the turn-on and turn-off processes, it can also be seen that the MOSFET produces some oscillations and current spikes at the moment of turn-on and turn-off.
As shown in Figure 1, the flyback converter topology diagram including parasitic elements, where Cgs, Cgd and Cds are the stray capacitances of the gate-source, gate-drain and drain-source of the switch tube MOSFET, respectively, Lp, Lkp, Lks and Cp are the primary inductance of the transformer, the leakage inductance of the primary inductance, the leakage inductance of the secondary inductance and the stray capacitance of the primary coil, respectively, and Cj is the junction capacitance of the output diode. Figure 5 shows the equivalent analysis circuit corresponding to the flyback converter working in the DCM working mode, when the switch tube works at (a) the turn-on moment, (b) the turn-on stage, (c) the turn-off moment and (d) the turn-off stage, respectively, and Rds is the drain-source equivalent resistance of the switch tube.
The equivalent analysis circuit corresponding to each stage
At the moment the switch is turned on, since the voltage across the capacitor cannot change suddenly, the voltage across the stray capacitor Cp starts to be negative at the top and positive at the bottom, generating a discharge current. As the switch is gradually turned on, the power supply voltage Vin charges the stray capacitor Cp, and the voltage across it is positive at the top and negative at the bottom, forming a current spike flowing through the switch and Vin; at the same time, the Cds capacitor discharges the switch, also forming a current spike, but this peak current does not flow through Vin, and only forms a loop inside the switch; in addition, if the converter operates in CCM mode, due to the reduction in the voltage across the primary inductor Lp, the diode D begins to withstand the reverse bias voltage and turns off, causing a reverse recovery current, which is coupled to the primary side through the transformer, and also forms a current spike flowing through the switch and Vin.
In the on-stage of the switch, the diode D is cut off, the voltage across the capacitor Cp is Vin, and the current through the primary inductor Lp rises exponentially, approximately linearly. At the moment of the switch being turned off, the primary current id charges Coss. When the voltage across Coss exceeds the sum of Vin and nVo (the voltage reflected back from the secondary coil voltage of the transformer to the primary coil when the diode D is turned on), the diode D is forward biased and turned on under the voltage generated by the freewheeling of the primary inductor Lp, and Lk and Coss resonate, generating high-frequency oscillating voltage and current.
During the switch-off phase, the diode D is forward-biased and turned on, releasing the energy previously stored in Lp to the load end. At this time, the secondary coil voltage is clamped to be equal to the output voltage Vo, and coupled back to the primary side through a transformer with a turns ratio of n, so that the capacitor Cp voltage is charged to nVo (positive at the bottom and negative at the top), and the voltage across the primary inductor Lp is clamped to nVo. When the Lp freewheeling discharge is completed, D is reverse-biased and cut off, and Lp resonates with Coss and Cp, resulting in a decrease in the voltage on Cp.
3 Equivalent Analysis Schematic Diagram of Power MOSFETMOSFET is a voltage-controlled device. The source and drain electrodes of power MOSFET are not in the same plane. It is also called vertical MOSFET (VMOSFET). It has many characteristics different from lateral MOSFET. Generally, power MOSFET is regarded as a vertical JFET device driven by lateral MOSFET. Figure 6 shows the equivalent schematic diagram of power MOSFET including parasitic devices, where Lg, Ld, and Ls are the lead inductances of the gate, drain, and source of MOSFET respectively, Rg is the internal gate resistance of MOSFET, Cgd, Cgs, and Cds are the parasitic capacitance of MOSFET, and D is the parasitic body diode. Due to the existence of parasitic devices, the operation and analysis of power MOSFET in the flyback converter circuit become complicated, especially at the moment of conversion, the analysis of parasitic parameters becomes more important.
Figure 6 Equivalent schematic diagram of MOSFET including parasitic devices
The difference between super junction MOSFET and planar MOSFETFigure 7 shows the cross-sectional structure and electric field distribution of a planar MOSFET, from which it can be seen that the breakdown voltage of a planar MOSFET depends on the doping degree and thickness of the drift region, and the inclination of the electric field distribution is proportional to the doping degree of the drift region. Therefore, if a higher breakdown voltage is required, a thicker and lightly doped epitaxial layer is required, but from the on-resistance distribution of the MOSFET (as shown in Figure 8), it can be seen that the resistance of the epitaxial layer accounts for the majority, especially for high breakdown voltage MOSFETs.
In summary, due to the structure of the planar high-voltage MOSFET, the on-resistance is large, resulting in large conduction losses, and the switching speed is also subject to certain restrictions, and the switching losses are also relatively large. This obviously cannot meet the current electronic market demand for energy saving and improving converter efficiency. Based on the shortcomings of planar MOSFET, superjunction MOSFET came into being. Figure 9 shows the cross-sectional structure and electric field distribution of superjunction MOSFET. Different from the cross-sectional structure of planar MOSFET, superjunction MOSFET adopts a deeper P-type column structure. The epitaxial layer of planar MOSFET is almost replaced by alternating N-type and P-type semiconductor thin layers. The equivalent device model of planar MOSFET and superjunction MOSFET is shown in Figure 10.
Inserting a P-type region in the vertical direction of the superjunction MOSFET can compensate for the excess current conduction charge. Applying a reverse bias voltage to the drift layer will generate a lateral electric field, which will deplete the PN junction. When the voltage reaches a certain value, the drift layer is completely depleted and will act as a voltage support layer, so that the breakdown voltage of the device depends only on the thickness of the N-drift region, and has nothing to do with the doping concentration of the N-region and the P-well region. The more sufficient this charge compensation is, the higher the breakdown voltage. Due to the significant increase in doping concentration, at the same breakdown voltage, the on-resistance Ron can be greatly reduced, even breaking through the silicon limit; similarly, at the same breakdown voltage and the same on-resistance Ron, a smaller chip area can be used, thereby reducing gate charge, increasing switching speed, and reducing drive power and switching losses.
4 Causes and propagation of electromagnetic interference generated by flyback converters
Electromagnetic interference mainly includes conducted interference and radiated interference. Conducted interference is the interference noise flowing through the input and output lines, which comes from differential mode current noise and common mode current noise; radiated interference is the interference noise radiated through space, which comes from electric field emission and magnetic field emission, and they can be converted into each other.
There are many reasons why switching power supplies generate electromagnetic interference, among which power switching devices and transformers are the main noise sources. The high-frequency opening and closing of switching devices leads to rapid changes in current and voltage. The rapid current changes of inductance and parasitic inductance generate magnetic fields, resulting in higher voltage spikes uL=L×diL/dt; the rapid voltage changes of capacitance and parasitic capacitance generate electric fields, resulting in higher current spikes iC=C×duC/dt, and the stray inductance and parasitic capacitance of its internal leads are channels for noise coupling. However, since these parameters are inherent characteristics of the device, electronic design and application engineers cannot optimize them and can only select matching devices according to the device manual. The switching tube MOSFET has been analyzed above.
Contains equivalent analysis schematics of parasitic devices, the structural and parameter differences between super junction MOSFET and planar MOSFET, and the causes of electromagnetic interference. Designers can choose to use and optimize according to the situation.
The transformer is another major noise source, and the primary-secondary leakage inductance, primary interlayer capacitance, secondary interlayer capacitance, and coupling capacitance between primary and secondary are noise channels. The transformer model with parasitic capacitance is shown in Figure 11, where Ca is the capacitance from the outermost winding to the core, Ct is the capacitance from the auxiliary winding to the secondary winding, Cs is the capacitance from the primary winding to the secondary winding, Cp is the interlayer capacitance of the primary winding, and Cm is the capacitance from the innermost primary winding to the core; in addition, the transformer also has a capacitance from the core to the ground Cme and a capacitance from the output line to the ground Coe. The interlayer capacitance of the primary or secondary can be reduced by reducing the number of winding layers, and increasing the width of the transformer skeleton window can reduce the number of winding layers.
Separate winding of windings, such as sandwich winding of primary winding, can reduce primary leakage inductance, but due to the increase in contact area between primary winding and secondary winding, the coupling capacitance between primary winding and secondary winding is increased. Copper shielding (needs to be connected to the static point of primary or secondary) can reduce the coupling capacitance between primary winding and secondary winding, but because the shielding layer is wound between primary winding and secondary winding, the coupling coefficient between primary winding and secondary winding is reduced, thereby increasing leakage inductance.
The differential mode current flows in opposite directions between the two input power lines (L and N), forming a current loop. One of them is the source line of the differential mode current, and the other is the return line of the differential mode current, which is mainly generated by the high-frequency switching current of the switching device. Figure 12 shows the flow of differential mode current at the moment the switch tube is turned on. It can be seen that IDM=ICp+ nIRICin; Figure 13 shows the flow of differential mode current at the moment the switch tube is turned off. It can be seen that IDM=ICds+IgICpICin.
Figure 13 Differential mode current at the moment the switch is turned off
The common-mode current flows between the input line, the output line and the ground, and is mainly generated by the transient change of the voltage when the power device works at high frequency. Figure 14 shows the flow channel of the common-mode current, which mainly includes the common-mode current generated by Cde, Cm and Cme, Ca and Cme, Ct and Coe, Cs and Coe, among which the common-mode current passing through Cs and Coe plays a dominant role.
Electric field emission is generated by du/dt, and space capacitance is the channel for electric field emission, in which common-mode current can generate considerable electric field emission. Figure 15 shows the location of the main electric field emission sources of the flyback converter, in which the voltage change amplitude of the primary winding is large, which plays a dominant role in electric field emission. In addition, for products with long output wires (1.8m) such as mobile phone chargers, the long output wires also act as an antenna, which can amplify the common-mode current, thereby forming a larger common-mode electric field emission.
Figure 15 Location of the main E-field emission sources of the flyback converter
Magnetic field emission is generated by the high di/dt loop through the loop parasitic inductance. Figure 16 shows the main magnetic field emission loop of the flyback converter. The direction of magnetic field emission conforms to the right-hand rule. The current change amplitude on the secondary side is large, which plays a dominant role in magnetic field emission. In addition, the stray magnetic field of the transformer is also a source of magnetic field emission, which is mainly generated by the air gap of the transformer. For example, when the E-type core has air gaps on both sides, the stray magnetic field is large, and when the air gap is opened on the center column, the stray magnetic field is small. It should be noted that the parasitic inductance of the high di/dt loop increases with the increase of the loop area. Therefore, the design of the PCB is very critical for magnetic field emission. The current loop area on the secondary side should be as small as possible, and the wiring should be as short and thick as possible.
Figure 16 Main magnetic field emission loop of flyback converter
5 Measures to improve EMI of flyback converter using superjunction MOSFET
Through the working principle of the flyback converter, the causes of electromagnetic interference, the equivalent schematic diagram of MOSFET, and the comparative analysis of the structure and parameters of planar MOSFET and super junction MOSFET, it can be seen that although the use of super junction MOSFET reduces the loss and driving power of the flyback converter, the switching speed of the switch tube is increased, which increases the voltage and current change rate, thereby enhancing the electromagnetic interference of the flyback converter.
The hazards of electromagnetic interference are becoming increasingly obvious and serious. At present, many countries have made electromagnetic interference measurement a mandatory test item for electronic equipment, and have different interference limit requirements for different types of products. As an interface circuit between the power grid and the power-consuming equipment, the power supply inevitably generates electromagnetic interference while completing power transmission and satisfying power conversion. However, it is also particularly important to improve and pass the standard limit requirements. Based on the principle of electromagnetic interference generated by the flyback converter, the main methods to reduce electromagnetic interference are to reduce the rate of change of voltage and current; reduce the parasitic inductance and capacitance in the circuit; and optimize the PCB design.
1. Reduce the rate of change of voltage and current
Reducing the rate of change of voltage and current can be achieved by changing the gate drive resistance, changing the transformer structure or adding a buffer absorption circuit.
(1) Changing the gate resistance value can change the switching rate of the switch tube and the rate of change of voltage and current. As shown in Figure 17, a driving resistor Rg=Rg1+Rg2 is added to the gate of the switch tube. Increasing Rg reduces the switch tube's turn-on speed and speeds up the switch tube's turn-off speed. In order to reduce both the turn-on and turn-off speeds of the switch tube, a low-voltage drop fast recovery diode can be connected in parallel to Rg2 as shown in Figure 17. If it is connected in the direction of D1 (solid line), the gate driving resistor is Rg when the switch tube is turned on, and the gate driving resistor is Rg1 when it is turned off. The speed of the switch tube when it is turned off is slower than when the diode is not connected in parallel.
(2) At the moment when the switch of the flyback converter is turned off, the transformer's primary leakage inductance Lk and the switch's parasitic output capacitance Coss form a series resonant circuit, which will generate very high overvoltage and ringing. The higher the Q value of the circuit, the higher the ringing voltage. This excessively high ringing voltage may cause huge electromagnetic interference, and due to the increase in MOSFET leakage voltage, it may even reduce the reliability of the switch.
Change the structure of the transformer, add a recovery winding NR=Np to the primary winding of the transformer, make the two windings double-stranded, and wind them side by side on the magnetic core or bobbin to form a double-strand winding. As shown in Figure 18, one end of NR is connected to the primary ground, and the end with the same name as Np is connected to Vin through a diode D1. This method maximizes the coupling and obtains strict matching of parasitic capacitance and inductance. The coupling between the primary winding and other windings is not that important.
Figure 18 Adding recovery winding NR and diode D1 to realize passive damper
As shown in Figure 19, Figure (a) shows that when the switch is turned off, the primary current (channel 2, red waveform) charges Coss and rings at the drain of the MOSFET (Vds, channel 1, blue waveform). In Figure (b), channel 1 is still Vds, and the charging of Coss delays the secondary current (channel 2) through D by about 100ns. In Figure (c), the recovery winding NR directly bypasses the parasitic capacitance Coss, directs the accumulated leakage energy back to the power rail, and clamps the switch voltage (channel 1). Since Np=NR, Vds is limited to twice Vin, and the negative surge of the primary current (channel 2) is actually the current flowing out of the recovery winding. In Figure (d), the secondary diode D immediately becomes forward biased, the leakage flux prevents the current transmission, and the secondary current (channel 2) reaches a balanced peak until the leakage energy is fully recovered and the primary current drops to zero.
Figure 19 Comparison of switch voltage and current with recovery winding NR and without recovery winding
(3) The buffer absorption circuit changes the rate of change of high-frequency voltage and current. As shown in Figure 20, the RCD clamp circuit connected in parallel with the primary winding of the transformer can suppress the voltage spike generated by the transformer primary leakage inductance during the switch-off process; L1, L2 and L3 can reduce the rate of change of high-frequency current, but L1 and L2 only work on a specific frequency band, and L3 is only effective when working in CCM mode; R1C1, R2C2, R3C3, R4C4 and C5 can reduce the rate of change of high-frequency voltage across the corresponding power device. It should be noted that all these buffer absorption circuits need to consume a certain amount of power, generate additional power loss, and reduce the efficiency of the system; at the same time, they also increase the number of components, PCB size and system cost, so they must be selected according to actual needs.
Based on the analysis of the causes and flow directions of differential-mode current and common-mode current, the following are some methods to reduce differential-mode current and common-mode current. Designers can choose to use them according to their needs and actual conditions.(1) The differential mode filter can filter out the differential mode current. As shown in Figure 21, the differential mode filter is a second-order low-pass filter composed of an inductor and a capacitor. Since the inductor has stray capacitance, the high-frequency interference noise can be bypassed by the stray capacitance, making the filter ineffective. Using several electrolytic capacitors in parallel can reduce ESL and ESR, and reduce the high-order harmonics of the switching current due to the differential mode current formed by the ESL and ESR of the input electrolytic capacitor.
Figure 22 New structure transformer to reduce differential mode current(3) Connecting an X capacitor in parallel between the L and N lines can filter out differential mode interference.(4) MOSFET uses the source electrode to connect the chip substrate for heat dissipation instead of the drain electrode, and reduces the copper area of the drain area during PCB wiring in order to reduce Cde and lower the common-mode current.(5) Change the structure of the transformer to reduce the common-mode current. As shown in Figure 23, adjust the placement of the rectifier diodes of the auxiliary winding and the secondary winding to change the direction of voltage change, change the position of the moving point, and pay attention to the static point as close as possible to reduce the overall common-mode current; in addition, place copper foil on the inner layer, the width of the copper foil is less than or equal to the width of the primary winding, and the midpoint of the copper foil is connected to the static point by a wire. At the same time, a shielding winding (it can also be copper foil, the method is the same as placing copper foil on the inner layer) can be wound between the primary winding and the secondary winding, and between the auxiliary winding and the secondary winding. Just wind a full layer, one end is connected to the static point, and the other end is left floating and buried inside to reduce the overall common-mode current. However, the use of the shielding layer must meet the efficiency requirements, because the use of the shielding layer will reduce the coupling coefficient between the primary and secondary, and reduce the conversion efficiency.
Figure 23 New structure transformer to reduce common mode current
(6) Add a Y capacitor between the primary and secondary, as shown in Figure 24. Most of the common-mode current passing through Cs is bypassed by the Y capacitor and returned to the primary ground, because the value of the Y capacitor is much larger than Coe. The Y capacitor must be connected directly or as short as possible to the static point of the primary and secondary. Generally, the dV/dt when the switch is turned on is greater than the dV/dt when it is turned off. The Y capacitor is connected to the primary ground, otherwise it is connected to Vin.
Figure 24 Effect of Y capacitor on primary and secondary common mode current
3. Optimize PCB design
PCB design is critical to the generation of electromagnetic interference. The following are several PCB design methods to reduce electromagnetic interference. Designers can choose to use them according to their needs and actual conditions.
(1) The edge lines of the input and output terminals should not be adjacent and parallel to avoid reflection interference. Ground wire isolation should be added when necessary.
(2) Arrange the positions of each functional circuit unit according to the circuit flow. Figure 25 shows the four current loops inside the flyback converter, namely the power switch tube AC current loop, the output rectifier AC current loop, the input power supply current loop and the output load current loop. Each loop must be separated from the other loops. The input loop and the power switch loop must be directly connected to the two ends of the input capacitor; the connection between the output loop and the rectifier loop must be directly connected to the two ends of the output capacitor; the filter capacitor, power switch tube and transformer of the switch loop must be placed as close as possible; the rectifier, inductor and filter capacitor of the output rectifier loop must be placed as close as possible. When placing, the device direction must be determined so that the current path between them is as short as possible.
Figure 25 Main current loop inside the flyback converter
(3) The wiring of two adjacent layers should be perpendicular to each other. Parallel wiring is likely to cause parasitic coupling.
(4) Minimize high di/dt loops and use wide wiring to reduce differential mode interference.
(5) Avoid right-angle routing. Right-angle routing will change the line width of the transmission line, causing impedance discontinuity. The impact on the signal is mainly reflected in: the corner can be equivalent to a capacitive load on the transmission line, slowing down the rise time; impedance discontinuity will cause signal reflection; and EMI generated by the right-angle tip.
(6) The rationality of the internal grounding of the switching power supply directly affects the electromagnetic interference of the power supply and even affects its stable operation. Figure 26 shows the ground arrangement of the flyback converter, where the power ground is the branch under the current loop; the control ground is the ground connecting the control integrated circuit and the passive devices related to it. The control ground is very sensitive, so it should be placed after the other AC current loops are arranged. It must be connected to other grounds through some specific points. This connection point is the common connection point of all devices that generate the small voltage to be detected by the control IC, including the common connection point of the current detection resistor of the current-type converter and the lower end of the output resistor divider. In addition, each large current ground line should be short and wide, and the common end of the input filter capacitor should be the only connection point for other AC current grounds.
(7) Laying copper foil on the bottom layer of the PCB of the power supply or adding an extra copper foil or single-sided board can effectively reduce electric field emission and common mode current (as shown in Figure 27)
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