PIN Diode Phase Shifter

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PIN Diode Phase Shifter

PIN diodes are used in phase shifter circuit designs as switches connected in series or parallel. In this case, the element being switched is a length of transmission line or a reactive element. The criteria for selecting a PIN diode for use in a phase shifter are similar to those for selecting diodes for other switching applications. However, another factor that must always be considered is the potential for introducing phase distortion, especially at high RF power levels or low reverse bias voltages. It is worth noting that the inherent characteristics of PIN diodes that produce low distortion, namely long carrier lifetime and thick I region, also result in low phase distortion of RF signals. The three most common types of semiconductor phase shifter circuits, namely: switch-line, load-line, and hybrid coupled designs are described below:

A. Switched Line Phase Shifter Figure 1 shows a basic example of a switched line phase shifter circuit. In this design, two SPDT switches using PIN diodes are used to change the electrical length of the transmission line by a certain length. The phase shift obtained from this circuit varies with frequency and is a direct function of the differential line length as follows:

A switched-line phase shifter is essentially a broadband circuit that produces a true time delay, with the actual phase shift depending only on Δ This design is most commonly used for frequencies below 1 GHz due to PIN diode capacitance limitations.

Figure 1 Switching line phase shifter

The power handling and loss characteristics of the switched-line phase shifters are the same as those of a series-connected SPDT switch. A unique feature of this circuit is that the power and voltage stress on each diode is independent of the amount of differential phase shift produced by each phase shifter. Therefore, four diodes are required per bit, all with the same power and voltage ratings.

B. Load-Line Phase Shifter The load-line phase shifter design shown in Figure 2 operates differently than the switched-line phase shifter. In this design, the portion of the maximum phase shift required consists of a pair of PIN diodes that do not completely interfere with the main transmission line. A major advantage of this phase shifter is its extremely high power capability, due in part to the use of parallel mounted diodes, plus the fact that the PIN diodes are never in the direct path of the full RF power.

Figure 2 Load line phase shifter

In a load-line phase shifter, the normalized susceptance Bn is switched in and out of the transmission path via a PIN diode. Typical circuits use values of Bn that are much less than unity, thus resulting in considerable decoupling of the transmitted RF power from the PIN diode. The phase shift of a single section is as follows:

The maximum phase shift obtainable from the load line section is limited by bandwidth and diode power handling considerations. The power constraints for obtainable phase shift are as follows:

Among them:

max = Maximum phase angle

PL = Transmit Power

VBR = Diode Breakdown Voltage

IF = Diode rated current

The above factors limit the maximum phase shift angle in practical circuits to about 45°. Therefore, a 180°C phase shift requires the use of four 45° phase shift sections in its design.

C. Reflective Phase Shifter The hybrid coupled phase shifter shown in Figure 3 is a circuit design that handles high RF power and large incremental phase shifts using a minimum number of diodes. The phase shift of this circuit is shown below:

Figure 3 Hybrid coupler reflective phase shifter

The voltage stress on the shunt PIN diode in this circuit also depends on the amount of phase shift or "bit" required. The maximum voltage stress is associated with a 180° drill bit and is reduced by a factor of (sin/2)1/2 for other drill bit sizes. The relationship between maximum phase shift, transmitted power, and PIN diode rating is as follows:

Compared to load-line phase shifters, hybrid designs can handle up to twice the peak power while using the same diodes. In both hybrid and load-line designs, the power dependence of the maximum bit size is related to the product of the maximum RF current and peak RF voltage that the PIN diode can handle. By judicious choice of the nominal impedance in the plane, the current and voltage stresses can usually be adjusted to within the device ratings. Typically, this means reducing the nominal impedance to reduce the voltage stress to support higher RF currents. For PIN diodes, the maximum rated current should be specified or depends on the rated power dissipation, while the maximum voltage stress at RF frequencies depends on the Iregion thickness.

PIN diode distortion model

The opening section of this article deals with large signal operation and thermal considerations that enable circuit designers to avoid conditions that cause significant changes in PIN diode performance or excessive power dissipation. A subtle but often important operating characteristic is the distortion or change in signal shape that is always produced by a PIN diode in the signal it controls.

The main cause of distortion is any change or nonlinearity in the impedance of the PIN diode during the application of the RF signal. These changes can be the effects of the diode's forward bias resistance, RS, the parallel resistance, RP, the capacitance, CT, or low frequency IV characteristics. Distortion levels can range from less than 100 dB to levels close to the desired signal. Distortion can be analyzed in the Fourier series, using the traditional form of all orders of harmonic distortion when applied to a single input signal, and using harmonic intermodulation distortion when applied to multiple input signals.

Nonlinear, distortion-generating behavior is often desired for PIN and other RF-oriented semiconductor diodes. Self-biased limiting diodes are typically designed as thin I-region PIN diodes operating near or below their transmit time frequency. In detector or mixer diodes, the distortion caused by the diode's ability to follow its IV characteristic at high frequencies is exploited. In this context, the term "square-law detector" applied to detector diodes implies a second-order distortion generator. Methods for selecting and operating PIN diodes to achieve low distortion are described in the PIN switch circuit discussed at the beginning of this article and in the attenuators and other applications discussed here.

There is a common misconception that minority carrier lifetime is the only important PIN diode parameter that affects distortion. This is indeed a major factor, but another important parameter is the width of the I region, which determines the transit time of the PIN diode. Diodes with longer emission times are more likely to maintain their static level of stored charge. The longer transit time of thick PIN diodes reflects their ability to follow the PIN diode resistor stored charge model.

according to:

Among them:

IF = forward bias current

τ = carrier lifetime

W = I zone width

n = Electron mobility

p = hole mobility

Rather than nonlinear IV characteristics.

The effect of carrier lifetime on distortion is related to the static level of stored charge caused by the DC forward bias current and the ratio of this stored charge to the incremental stored charge added or removed by the RF signal.

Distortion in PIN Diode Switching

The distortion produced by forward biased PIN diode switching has been analyzed* and shown to be related to the ratio of stored charge to diode resistance and the operating frequency. The prediction equations for the second order intermodulation intercept point (IP2) and third order intermodulation intercept point (IP3) are derived from PIN semiconductor analysis and are shown below:

Among them:

F = Frequency

RS = PIN diode resistance in ohms

Q = stored charge in nC

In most applications, for small or moderate signal sizes, the distortion produced by a reverse biased diode is less than that produced by a forward bias. This is especially true when the reverse bias applied to the PIN diode is greater than the peak RF voltage, preventing any transient swing into the forward bias direction.

The distortion generated in a PIN diode circuit can be reduced by connecting an additional diode in a back-to-back orientation (cathode to cathode or anode to anode). This results in a cancellation of the distortion currents. The cancellation should be complete, but the distortion generated by each PIN diode is not exactly equal in amplitude and opposite in phase. This back-to-back configuration is expected to improve distortion by approximately 20 dB.

Distortion in Attenuator Circuits

In attenuator applications, distortion is directly related to the ratio of RF to DC stored charge. In such applications, PIN diodes are operated only in the forward biased state and usually at high resistance values where the stored charge can be very low. Under these operating conditions, distortion will vary with the charge in the attenuation level. Therefore, the PIN diode selected for use in an attenuation circuit only needs to be selected based on its thicker I region width, since the charge stored at any fixed diode resistance Rs1 depends only on this size.

Consider using the MA4PH451 PIN diode in an application that requires a 50 Ω resistor. The MA4PH451 datasheet indicates that 1 mA is the typical diode current at which this occurs. Since the typical carrier lifetime of this diode is about 5 S, the charge stored by the MA4PH451 diode at 50 Ω is 5 nC. However, if two MA4PH451 PIN diodes are inserted in series to achieve the same 50 Ω resistance level, each diode must be biased at 2 mA. This results in each diode storing 10 nC of charge or a net stored charge of 20 nC. Therefore, adding a second diode in series multiplies the effective stored charge by a factor of 4. This will have a significant positive impact on reducing the distortion produced by the attenuator circuit.

Measuring distortion

Since distortion levels are often 50 dB or more below the desired signal, special precautions need to be taken to make accurate second- and third-order distortion measurements. It is first necessary to ensure that the signal source used is free of distortion and that the dynamic range of the spectrum analyzer used is sufficient to measure the specified distortion levels. These requirements often lead to the use of fundamental band stop frequencies at the output of the equipment as well as preselectors to clean up the signal source used. In order to determine if the test equipment and signal source are adequate to make the desired distortion measurements, the test circuit should first be evaluated by removing diodes and replacing them with passive components. This approach allows the test setup to be optimized and basic measurement limits to be established.

Since harmonic distortion only appears at multiples of the signal frequency, these signals may be filtered out in a narrowband system. Second-order distortion caused by the mixing of two input signals will appear at the sum and difference of these frequencies and may also be filtered out. To help identify the various distortion signals seen on a spectrum analyzer, it should be noted that the level of the second distortion signal will change directly at the same rate as any change in the input signal level. Therefore, a 10 dB increase in the signal will result in a corresponding 10 dB increase in second-order distortion.

Third-order intermodulation distortion of two input signals at frequencies FA and FB typically produces in-band, unfilterable distortion components at frequencies 2FA - FB and 2FB - FA. This type of distortion is particularly troublesome in a receiver located near a transmitter operating on equally spaced channels. When identifying and measuring such signals, it should be noted that the third-order distortion signal level changes at twice the rate of change of the fundamental signal frequency. Therefore, a 10 dB change in the input signal will result in a 20 dB change in the third-order distortion signal power observed on the spectrum analyzer.

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1. Basic structure: The PIN diode phase shifter consists of three circuits, namely a coupler, a bias distribution network and a variable delay line. The coupler is used to mix the external input signal with the sinusoidal signal and transmit the signal to the core component of the phase shifter - the variable delay line.

2. Working principle: The variable delay line controls the delay of the signal by adjusting the reverse bias voltage of the PIN diode and changing the resistance value of the PIN diode, thereby changing the phase angle of the output signal and completing the phase shift process of the signal.

3. Characteristic parameters: PIN diode phase shifter has characteristic parameters such as large bandwidth, low insertion loss, fast controllable phase shift angle, etc. It can be widely used in wireless communication, radar, satellite communication, millimeter wave RF electroacoustics and other fields.

4. Performance optimization: In actual use, it is necessary to select the appropriate PIN diode model and parameter settings according to the specific application scenario. At the same time, it is necessary to pay attention to the matching of the variable delay line and the PIN diode, minimize the distortion and noise of the signal in the circuit, and carry out relevant performance testing and optimization work to achieve the best system performance.