Python Hardware Verification - Summary
This section “Hardware Verification in Python” is part of “Hardware Verification Languages”, which in turn belongs to the “Verification IP & IP Core Verification” volume of the “Semiconductor IP Core – Not Just Design” book series.
This chapter introduces some key Python methods, tools, packages, and libraries involved in IC and IP core design process verification, including the following chapters:
Pure Python - Why Python? How to use Python for verification (testbench)?
Cocotb - (Testbench for CO-routine and CO-simulation) is probably the de facto standard Python design verification method
MyHDL - Python-based hardware description language that also has verification capabilities
PyUVM - Python implementation of UVM using cocotb
UVM Python – Python implementation of UVM
PyMTL - A Python framework for open source hardware modeling, generation, simulation, and verification
PyHVL - Python Validation Tool
Constraints and overrides
PyVSC package: SystemVerilog-style constraints and coverage in Python
YosysHQ/MCY - Mutation coverage for Yosys
Front-end driver
YosysHQ/SymbiYosys (sby) -- front-end for Yosys-based formal verification flows
Symbolic Model Checking
COSA: integrated verification of agile hardware design
Metaprogramming Hardware Verification Components
FAULT: A Python Embedded Domain-Specific Language for Metaprogramming Portable Hardware Verification Components
Reinforcement Learning Model (RL)
VxPd
Python Prototyping
VPSim - Rapid Virtual Prototyping for Design and Exploration of Embedded Computing Systems
pyrtl - A Python approach to rapid hardware prototyping and instrumentation
Python Simulation
ICEMU - Simulating Integrated Circuits in Python
AMIQ OFC - Open source framework for co-simulation using PYNQ
Python simulation
PyCPU Simulator - A CPU simulator written in Python
PyOPUS - A Python library for connecting to various simulators
AHKAB - A SPICE-like electronic circuit simulator written in Python
PySPICE - Simulate electronic circuits using Python and the NGSpice / Xyce simulator
cosimtcp - Co-simulation of HDL using Python and Matlab over TCL TCP/IP sockets in Xilinx Vivado and Modelsim tools
PyVHDL: A hardware simulation environment integrating Python and VHDL
FPGA_HW_SIM_FWK - FPGA Hardware Simulation Framework
Python being the most popular programming language is a natural choice for Hardware Verification Language (HVL), especially for newcomers in the field of IC design who have not had much exposure to more demanding HVLs like SystemVerilog, Verilog, SystemC, e, VHDL, etc. Python is easy to learn (which you may already be familiar with), but Python is still powerful enough to meet some key verification requirements. Versatility and the ability to cope with almost any design concept are the hallmarks of Python, so it is not surprising that it eventually found its way to hardware design. Hardware modules are modeled as Python functions with wrapper decorators that return sets of generators. Therefore, the semantics and structure of Python functions are used to support features such as arbitrary hierarchies, components, named port associations, etc...
However, the goal for production verification engineers is not to replace UVM with Python. UVM can do a lot of clever things that Python can't (easily) do. The goal of developing and using Python around verification is to fill holes in mainstream verification methodologies. To be used for ridiculous testing and to support designers running their own verification. To speed up standard verification flows and support chip bring-up test development. And so on and so forth.
This 500+ page introductory material will introduce the reader to the main Python methods, systems, packages, and libraries for handling hardware verification needs, including prototyping and simulation. After reading it, the reader will be familiar with the development history, key features, installation and configuration, use, verification samples and results of these technologies, and their applications in the field of IC design and verification. I will leave the comparison of these technologies to my readers, because these technologies are still maturing and it is too early to say who is the best among dozens of Python-based verification systems.
I wrote this book in English and slightly translated it into Chinese.
For more information on chapters, please contact the author to obtain the full text.