MSP430 clock system

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MSP430 clock system [Copy link]

MSP430 can choose to use up to 3 oscillators depending on the model. We can choose the appropriate oscillation frequency according to the needs, and can turn off the oscillator at any time when not needed to save power. The three oscillators are:

(1) DCO digital controlled RC oscillator. It is inside the chip and can be turned off when not in use. The oscillation frequency of DCO is affected by the ambient temperature and the operating voltage of the MSP430, and the frequency generated by the same model of chip is also different. However, the adjustment function of DCO can improve its performance. Its adjustment is divided into the following three steps: a: Select BCSCTL1.RSELx to determine the nominal frequency of the clock; b: Select DCOCTL.DCOx to make segmented coarse adjustments based on the nominal frequency; c: Select the value of DCOCTL.MODx for fine adjustments.

(2) LFXT1 is connected to a low-frequency oscillator. Typically, it is connected to a 32768HZ clock oscillator, directly connected between XIN and XOUT. In this case, the oscillator does not need to be connected to a load capacitor. It can also be connected to a standard crystal oscillator of 450KHZ~8MHZ, in which case a load capacitor is required. The frequency signal generated by LXFT1 is ACLK. The low-speed clock requires hundreds of milliseconds to stabilize.

(3) XT2 is connected to a standard crystal oscillator of 450KHZ~8MHZ. The external standard crystal oscillator is connected between XT2IN and XT2OUT. At this time, a load capacitor needs to be connected and it can be turned off when not in use.

Low-frequency oscillators are mainly used to reduce energy consumption, such as in battery-powered systems, while high-frequency oscillators are used to respond quickly to events or for the CPU to perform large amounts of calculations.

MSP430 has three clock signals: MCLK system main clock; SMCLK system sub-clock; ACLK auxiliary clock.

(1) MCLK system main clock. In addition to the CPU operation using this clock, peripheral modules can also use it. MCLK can select any clock signal generated by an oscillator and divide it by 1, 2, 4, or 8 as its signal source.

(2) SMCLK system sub-clock. For use by peripheral modules. It can be divided by the registers of each module before use. SMCLK can be the clock signal generated by the XT2CLK or DCOCLK oscillator and divided by 1, 2, 4, or 8 as its signal source.

(3) ACLK auxiliary clock. For use by peripheral modules. It can be divided by the registers of each module before use. However, ACLK can only be divided by 1, 2, 4, or 8 by LFXT1 as a signal source. It can be used as a background clock to wake up the CPU.

(4) ACLK/N, ACK buffer output, which can be obtained by ACL.1.2.4.8 division and can only be used externally.

After PUC is reset, the signal sources of MCLK and SMCLK are DCO, and the oscillation frequency of DCO is 800KHZ. The signal source of ACLK is LFXT1.

The MSP430 contains a crystal oscillator failure monitoring circuit that monitors the clock signals output by LFXT1 (working in high-frequency mode) and XT2. When the clock signal is lost for 50us, the monitoring circuit detects the oscillator failure. If the MCLK signal comes from LFXT1 or XT2, the MSP430 automatically switches the MCLK signal to DCO, which ensures that the program continues to run. However, the MSP430 does not monitor the LFXT1 working in low-frequency mode.