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Circuit simulation help Cadence Pspice [Copy link]

This post was last edited by a blue external skill on 2019-11-12 12:30

Hello everyone, I am a student in school. Recently, I am learning to use Cadence to design circuits, and then use PSpice A/D to simulate the designed receiving signal processing link. When simulating, I found that the result is not the same as expected. The receiving signal seems to oscillate? ? ? ?

The receiving signal processing link is: voltage follower-----same-direction proportional amplifier------filter------voltage follower

The operational amplifier used is AD8031a, and the current given input signal is a 200KHz sine wave.

The simulation circuit diagram is shown below:

The measured received signal is as follows:

Amplify the received signal and observe:

I found a phenomenon that seemed to be an oscillation, and then I did an FFT on the received signal and found the frequency point, as shown below:

There is a frequency of about 18.5MHz, but I can't find the source of this frequency. I don't know if it is because of a problem in the circuit design that causes the circuit to oscillate, or because I just started learning to use Cadence and there is a problem with the simulation settings. I would like to ask the circuit masters for guidance. Thank you very much!

This post is from Analog electronics

Latest reply

The second stage is self-excited, right? If you remove the input, it should still be there. Try adjusting the secondary feedback network, the capacitor at the inverting end?   Details Published on 2019-11-19 09:48

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Don't sink!!!!

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sharp
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I can't even imitate it, I'm such a rookie  Details Published on 2019-11-12 15:58
 
 
 
 

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I can't even imitate it, I'm such a rookie

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Please look at me, guys.

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2w

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I have never used Cadence simulation, so I am not sure if it is a problem with the software settings or the FFT and sampling rate.

Or you can use Multisim or other software to verify it

This post is from Analog electronics

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Thanks for your reply. Is there any problem in the circuit diagram?  Details Published on 2019-11-13 17:53
 
 
 
 

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It seems that both followers U4 and U7 can be removed without much impact on the operation of the entire circuit.

This post is from Analog electronics

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Thanks for your reply. It is mainly for the isolation and buffering of the front-end circuit and the back-end circuit. It is not necessary according to the schematic diagram. But I still can't find the source of the circuit oscillation.  Details Published on 2019-11-13 17:54
 
 
 
 

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qwqwqw2088 posted on 2019-11-12 17:29 I have never used Cadence simulation, so I am not sure if it is a problem with the software settings or the FFT and sampling rate. Or you can use Multisim or other software to verify it...

Thanks for your reply. Is there any problem in the circuit diagram?

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maychang posted on 2019-11-12 18:02 It seems that both followers U4 and U7 can be removed without much impact on the operation of the entire circuit.

Thanks for your reply. It is mainly for the isolation and buffering of the front-end circuit and the back-end circuit. It is not necessary according to the schematic diagram. But I still can't find the source of the circuit oscillation.

This post is from Analog electronics

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The first post is that oscillation occurs during simulation, but simulation is not very reliable. The distributed parameters during simulation are difficult to be consistent with the distributed parameters in the actual circuit, and these distributed parameters are precisely the cause of oscillation. These distributed parameters cannot be seen from the electrical schematic.  Details Published on 2019-11-13 18:17
 
 
 
 

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A blue external power method was published on 2019-11-13 17:54 Thank you for your reply. It is mainly for the isolation and buffering of the front-end circuit and the back-end circuit. From this schematic diagram, it is really not necessary. But...

The first post is that oscillation occurs during simulation, but simulation is not very reliable. The distributed parameters during simulation are difficult to be consistent with the distributed parameters in the actual circuit, and these distributed parameters are precisely the cause of oscillation. These distributed parameters cannot be seen from the electrical schematic.

This post is from Analog electronics
 
 
 
 

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The second stage is self-excited, right? If you remove the input, it should still be there. Try adjusting the secondary feedback network, the capacitor at the inverting end?

This post is from Analog electronics
 
 
 
 

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