Detailed analysis of module timers based on MCU

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Detailed analysis of module timers based on MCU [Copy link]

In MCU (M16), the timer is an independent module. M16 has three independent timer modules, namely T/C0, T/C1 and T/C2; T/C0 and T/C2 are both 8-bit timers, while T/C1 is a 16-bit timer. The timer is a hardware module that runs independently of the CPU. 1. When does the timer start working (or counting)? When TCCR0! = 0x00, in any mode, as long as the MCU is powered on, T/C starts timing. In fact, TCCR0 is mainly used for the pre-scaling, waveform mode, and comparison match mode settings of the timer. Speaking of pre-scaling, this module must be mentioned. This module is a module shared by T/C0 and T/C1, but it can have different frequency settings. 2. How does the timer work? When it comes to the work of the timer, we have to mention three important parameters: TCNT0, OCR0, and TIMSK. TCNT0 is used to set the initial value of the timer. After the timer starts working, it will accumulate from TCNT0 to 0XFF. The time consumed by the accumulation process is the timing time we need; OCR0 is a comparison setting value. When the value of TCNT0 accumulates to OCR0 (TNCT0==OCR0), if the compare match interrupt function is turned on, a compare interrupt will be generated at this time. Therefore, the value of OCR0 is generally set between the initial value of TCNT0 and 0XFF, and any value outside of it will not generate a compare interrupt. TIMSK is an interrupt enable bit setting, which means that when we need a timer overflow interrupt or a compare match interrupt function or both, we set the corresponding register bit of TIMSK. 3. Timer interrupts A timer can have two interrupt resources available, one is an overflow interrupt only, and the other is a compare match interrupt, as mentioned in 2 above. The overflow interrupt subroutine that I want to explain generally needs to reload the initial value of TCNT0, otherwise, TCNT0 will count up from 0X00 to 0XFF, and the time consumed is not the time we want. Comparison interrupt means that when TCNT0==OCR0, a comparison match interrupt occurs; therefore, only a small amount of processing code is generally inserted in the interrupt subroutine, otherwise, the so-called interrupt nesting phenomenon will occur. Since M16 does not support interrupt nesting, this will make some codes in the interrupt subroutine unable to execute, and in severe cases, it will cause the system to crash. 4. Conversion of TCNT0 and OCR0 values: For an 8-bit timer, TCNT0 can generally be converted by the following formula: TCNT0=256-(TV*F)/N; TV: the desired timing time, unit, usF: crystal frequency (MHz) N: frequency division factor The timer runs independently, it does not occupy CPU time, does not require instructions, and only needs to participate when calling the corresponding register. Take AVR mega16 as an example, it has three registers, timer0, timer1 and timer2, T0 and T2 are 8-bit timers, T1 is a 16-bit register, T2 is an asynchronous timer, and all three timers can be used to generate PWM. Let's take timer T0 as an example to briefly introduce the operation of the timer. T0 has three registers that can be accessed by the CPU, TCCR0, TCNT0, OCR0. Let's take a look at a timer initialization program generated by ICC. //TIMER0 initialize - prescale:8 // WGM: Normal // desired value: 1KHz // actual value: 1.000KHz (0.0%) void timer0_init(void) { TCCR0 = 0x00; //stop TCNT0 = 0x83; //set count OCR0 = 0x7D; //set compare TCCR0 = 0x02; //start timer } TCCR0 is a control register used to control the working mode details of the timer; TCNT0 is a T/C register, whose value is added or subtracted in each working cycle of the timer to implement timing operations. The CPU can read and write TCNT0 at any time; OCR0: Output compare register, which contains an 8-bit data that is continuously compared with the counter value TCNT0. Match events can be used to generate output compare interrupts or to generate waveforms on the OC0 pin. Here is the simplest mode, TCNT keeps adding one, reaches the maximum value 0xFF and then clears to enter the next count, in the above program. TCCR0 = 0x00; turn off the clock source of T0, and the timer stops working. TCNT0 = 0x83; set the initial value of the T/C register, and let the timer start timing or counting from TCNT0 from 0x83. OCR0 = 0x7D; set the value of the compare match register, which is not used in this program. TCCR0 = 0x02; select the clock source, which comes from the clock divided by 8. After setting, the timer starts working. After initialization, the timer starts working. TCNT0 increases by one at each timer clock. When TCNT0 is equal to the value of OCR0, OCF0 in the T/C interrupt flag register - TIFR is set. If OCIE0 in TIMSK is 1 at this time (that is, T0 compare match interrupt is allowed), and global interrupts are allowed, the compare match interrupt will run. In the interrupt program, TCNT0 and OCR0 can be operated to adjust the timer. TCNT0 continues to increase by one. When it reaches 0xFF, TOV0 in the T/C interrupt flag register - TIFR is set. If TOIE0 in TIMSK is 1 at this time (that is, T0 overflow interrupt is allowed), and the global interrupt is allowed, the overflow interrupt will run. In the interrupt program, TCNT0 and 0CR0 can be operated to adjust the timer. The registers related to the timer include SREG and TIMSK. The former bit 1 controls the global mid-segment enable, and the latter bit 1 (OCIE0) and bit 0 (TOIE0) respectively control the compare match interrupt and overflow compare match interrupt enable. In the actual process, the operation of the timer-related registers is very flexible. The value of TCNT0 can be modified in the overflow interrupt, and the value of OCR0 can also be modified in the interrupt. In the following experiments, the method of using timer 1 to modify OCR1A to achieve 1S precise timing will be discussed.