Inductor layout in DC-DC circuits

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Inductor layout in DC-DC circuits [Copy link]

Inductor

First, let's briefly review the inductor characteristics related to layout.

When current flows through an inductor, magnetic lines of force are generated. When these magnetic lines of force pass through a conductor (the conductor of a PCB is copper foil), eddy currents are generated in this part. In other words, if there is a conductor near the inductor, problems may occur due to eddy currents. Since eddy currents flow in a direction that cancels out the magnetic lines of force, the inductance value decreases and the Q value decreases (loss increases). By the way, Q is the amount of inductance loss. One of the parameters is, "large Q value = small loss". In addition, if the copper foil near the inductor is a signal line, eddy currents may cause noise to propagate to the signal, which may have an adverse effect on the circuit operation.

One more point. Inductors are heat-generating components. As we all know, when current flows through an inductor, it generates heat due to the resistance component of the winding and other losses. As the temperature of the inductor rises, in addition to component deterioration, in the case of a ferrite core, if the Curie temperature is exceeded, the inductance value will drop sharply. Rated current and resistance specifications are generally provided as reference standards, but heat dissipation needs to be considered during actual installation.

Please keep these points in mind as well as the following key points.

Inductor Placement

In order to minimize the radiated noise from the switch node, place the inductor as close to the IC as possible, although it is second only to the input capacitor in terms of importance.

If the copper foil area is excessively increased to reduce the heat dissipation of wiring resistance, the copper foil may act as an antenna and increase EMI, so do not increase the copper foil area excessively. [ Figure 6-a shows an example of a layout that considers the wiring area from the perspective of EMI, and Figure 6-b shows an example of a bad layout that uses unnecessary wiring. The specific wiring width can be determined by referring to the current withstand characteristics. Figure 5 is a graph showing the conductor width and temperature rise due to self-heating when a certain current flows. For example, when a current of 2A flows through a wiring with a conductor thickness of 35μm, a conductor width of 0.53mm can be used to suppress a temperature rise of 20℃. However, since the wiring is affected by the heat generated by peripheral components and the ambient temperature, sufficient margin is required. For example, it is recommended that the conductor width for each 1A in a 1oz (1OZ) (35μm) PCB board be 1mm or more, and the conductor width for each 1A in a 2oz (70μm) PCB board be 0.7mm or more.

Regarding the wiring around the inductor, the GND layer should not be configured directly under the inductor (Figure 6-c). This is as mentioned above. The magnetic lines of force pass through the conductor GND layer and generate eddy currents, which will be affected by the cancellation of the magnetic lines of force, causing the inductance value to decrease or the Q value to decrease (loss increase).

The non-GND signal line may also transmit switching noise to the signal due to eddy currents, so wiring directly under the inductor should be avoided. If you have to route signal lines, use closed magnetic circuit inductors with less magnetic leakage. However, you must actually test and confirm whether there is a problem.

In addition, you must pay attention to the space between the inductor pins. As shown in Figure 6-d, when the distance between the pins is close, the high-frequency signal of the switching node is induced to the output through the stray capacitance and capacitance.

Although it is not limited to inductors, the placement and wiring design of components often become constraints. Therefore, it is very important to carefully reflect the points that should be paid attention to in the layout design. If the results are not ideal, you must actually measure and confirm whether there is a problem.

Key points:

The inductor should be placed as close to the IC as possible.

The copper foil area should not be too large.

The GND layer should not be placed directly under the inductor. Also, try to avoid placing signal lines.

The wiring of the inductor pins should not be too close.

qwqwqw2088

"If you have to lay signal lines, use closed magnetic circuit inductors with less magnetic leakage. However, you must actually test and confirm whether there is a problem." This is a technical activity

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The wiring width can be determined by referring to the current tolerance characteristics.

alan000345

qwqwqw2088 posted on 2018-10-8 11:55 "When you have to lay signal lines, please use closed magnetic circuit inductors with less magnetic leakage. However, you must actually test and confirm whether there is a problem." This is a technical job

Yes, it is indeed a technical job. I feel that older hardware engineers are much better at it than those who develop software programs.

alan000345

qwqwqw2088 posted on 2018-10-8 11:55 "When you have to lay signal lines, please use closed magnetic circuit inductors with less magnetic leakage. However, you must actually test and confirm whether there is a problem." This is a technical job

Yes, it is indeed a technical job. I feel that older hardware engineers are much better at it than those who develop software programs.

alan000345

I like to play games Published on 2018-10-8 14:22 The wiring width can be determined by referring to the current tolerance characteristics. It is true

Yes, when my colleague was making a PCB to collect the voltage of each cell of the power battery, he used a very thin line width, and the result was a waste board, . As soon as they were connected, they all burned out.