Location:Training / Embedded Development / FPGA / Implementing wide dynamic range image sensor pipelines and video analytics using Altera FPGAs / Implementing wide dynamic range image sensor pipeline and video analysis using Altera FPGA(2)

    The new generation of wide dynamic range (WDR) sensors combined with the emerging IP (Internet Protocol) camera market has brought unprecedented opportunities to camera manufacturers, allowing them to launch better products at existing price points. Better-performing megapixel WDR finally meets user demands for image quality in all environments that have eluded users for the past two decades. 

    In order to give full play to the technical advantages of WDR sensors, it is necessary to adopt a new generation of ISP technology to process full-range real-time scenes at high pixel rates based on advanced algorithms. 

    We'll discuss the challenges faced by camera designers looking for better WDR performance and introduce the latest image sensor pipeline (ISP) from Altera partner Apical, which is the result of more than 10 years of project development. Using the most advanced image processing technology available, ISP is able to support 120dB WDR sensors, reaching 1080/60p, while achieving broadcast-level image quality. This technology, implemented in a low-cost FPGA, is the basis for rapidly developing next-generation WDR surveillance cameras.