Tsinghua University Altera FPGA Engineer Growth Manual

Tsinghua University Altera FPGA Engineer Growth Manual

FPGAThe other

At present, with the emergence of high-performance FPGA, FPGA is almost omnipotent in the design of digital systems and is widely used in various fields of digital products. FPGA technology has the characteristics of low development cost and fast time to market. As long as the corresponding development software is installed and a set of simple development boards are available, innovative designs can be carried out. This provides innovative individuals and small companies with a chance to survive.

Total of 14 lessons7 hours and 33 minutes and 56 seconds

SOPC development process based on FPGA (Intel official tutorial)

SOPC development process based on FPGA (Intel official tutorial)

FPGAThe otherIntelSOPC

Explain the complete SOPC development process and understand the basic concepts of SOPC and IP core knowledge

Total of 5 lessons1 hours and 5 minutes and 31 seconds

Learn more about SoC FPGAs

Learn more about SoC FPGAs

FPGASoCThe other

An in-depth look at SoC FPGA performance and how to leverage it, with an emphasis on software development tools and multi-core debugging.

Total of 14 lessons41 minutes and 43 seconds

Zhixin Technology FPGA introductory course

Zhixin Technology FPGA introductory course

FPGAVerilog HDLThe otherFourth II

Based on the ZX_2FPGA development board, we teach you step by step how to install the design tool (Altera Quartus II) and write programs in Verilog to conduct simple experiments.

Total of 5 lessons3 hours and 47 minutes and 36 seconds

Light flow and pedestrian detection via OpenCL

Light flow and pedestrian detection via OpenCL

OpenCLThe otherPedestrian Detection

Light flow and pedestrian detection via OpenCL

Total of 1 lessons2 minutes and 49 seconds

Altera Quartus II 14.1 uses DSE to optimize Quartus II designs

Altera Quartus II 14.1 uses DSE to optimize Quartus II designs

The otherFourth IIDSE

Watch this demonstration to learn how you can use DSE to optimize the timing, power, and area of ​​your Quartus II design.

Total of 1 lessons6 minutes and 58 seconds

Design input using hard-core floating point

Design input using hard-core floating point

The otherHardcorefloating point

Design input using hard-core floating point

Total of 1 lessons3 minutes and 23 seconds

How to Set Up and Use the 12 V DC-DC Converter Evaluation Board

How to Set Up and Use the 12 V DC-DC Converter Evaluation Board

DC-DC ConvertersThe otherEvaluation Board

How to Set Up and Use the 12 V DC-DC Converter Evaluation Board

Total of 1 lessons4 minutes and 3 seconds

How to measure the efficiency of a DC-DC converter

How to measure the efficiency of a DC-DC converter

DC-DC ConvertersThe other

How to measure the efficiency of a DC-DC converter

Total of 1 lessons3 minutes and 30 seconds

Design Easily with Enpirion Power SoC DC-DC Converters

Design Easily with Enpirion Power SoC DC-DC Converters

DC-DC ConvertersThe other

Design Easily with Enpirion Power SoC DC-DC Converters

Total of 1 lessons23 minutes and 11 seconds

Ray tracing demonstration using OpenCL on SoC

Ray tracing demonstration using OpenCL on SoC

SoCOpenCLThe other

Ray tracing demonstration using OpenCL on SoC

Total of 1 lessons3 minutes and 58 seconds

Altera Cyclone V SoC video application playback demonstration

Altera Cyclone V SoC video application playback demonstration

SoCThe otherCyclone V

Altera Cyclone V SoC video application playback demonstration

Total of 1 lessons1 minutes and 58 seconds

Altera2012 Asia Innovation Design Competition CN099 Video Introduction-01

Altera2012 Asia Innovation Design Competition CN099 Video Introduction-01

robotThe other

Altera2012 Asia Innovation Design Competition CN099 Video Introduction-01

Total of 1 lessons2 minutes and 14 seconds

3 ways to quickly adapt to changing Ethernet protocols

3 ways to quickly adapt to changing Ethernet protocols

FPGAEthernetThe other

Can your design quickly adapt to changing Ethernet protocols? Can you meet increasing performance requirements? Watch this video to learn how Industrial Networking Suite and flexible, low-power FPGAs can help you solve these challenges in embedded industrial applications.

Total of 1 lessons10 minutes and 4 seconds

Use low-cost, low-power CPLD development kits to make music and achieve more functions

Use low-cost, low-power CPLD development kits to make music and achieve more functions

The otherCPLD

Are you going to hit some notes? With our MAX® V CPLD Development Kit, you can hit some notes while evaluating your board's ability to drive analog chips. The kit also provides you with a platform for prototyping CPLD applications using MAX V CPLDs. You'll find that if value is the key consideration when selecting a CPLD, MAX V devices are your best choice because of their low power consumption, low cost, and reliable functionality.

Total of 1 lessons7 minutes and 23 seconds

Improve system performance with Altera's new memory controller IP

Improve system performance with Altera's new memory controller IP

The othermemory controllerUniPHY

Timing and signaling are critical factors in external memory design. Altera's new memory controller and UniPHY further improve systems by enabling higher clock data rates, reduced latency, ease of use, ease of debugging, voltage and temperature (VT) tracking, and PLL/DLL sharing. performance. In the demonstration, you will learn about the design flow, how to initialize the memory controller, and design and debug it.

Total of 3 lessons44 minutes and 25 seconds

Implementing wide dynamic range image sensor pipelines and video analytics using Altera FPGAs

Implementing wide dynamic range image sensor pipelines and video analytics using Altera FPGAs

FPGAThe otherImage SensorWDR sensor

In order to give full play to the technical advantages of WDR sensors, it is necessary to adopt a new generation of ISP technology to process full-range real-time scenes at high pixel rates based on advanced algorithms.

Total of 2 lessons27 minutes and 18 seconds

Easily develop designs using Altera Video and Image Processing Workbench

Easily develop designs using Altera Video and Image Processing Workbench

DSPThe otherImage Processing

Challenges faced by video and image processing designers (VIPs) include how to improve image format conversion quality, offload DSP loads, reduce system costs, and bring products to market in a timely manner. Altera Video Imaging Workbench is the ideal solution to quickly solve these challenges. In this technical VIP seminar, you will learn about Altera's VIP workbench and VIP design methods through live demonstrations.

Total of 1 lessons15 minutes and 46 seconds

PCI Express Design Using Altera Transceivers

PCI Express Design Using Altera Transceivers

The othertransceiverPCIEPCI Express

Using a simple design flow, you can easily develop PCIe designs with Altera embedded hard IP. This session introduces the key features of PCIe hard IP embedded in Stratix, Arria, and Cyclone family FPGAs.

Total of 2 lessons23 minutes and 1 seconds

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