ADI RadioVerse Technology and Design Ecosystem and AD9375 Industry’s First Broadband Transceiver with Integrated DPD Algorithm

ADI RadioVerse Technology and Design Ecosystem and AD9375 Industry’s First Broadband Transceiver with Integrated DPD Algorithm

5GtransceiverNAMERadioVerse

In this live broadcast, ADI RadioVerse™ Marketing Manager Weng Jie will bring you the latest updates on ADI's award-winning RadioVerse technology and design ecosystem, as well as introduce the latest member of ADI's highly integrated broadband RF transceiver series - the first The AD9375, an RF transceiver with an on-chip digital predistortion (DPD) algorithm, and an evaluation platform and reference design demonstration demonstrate how the AD9375 DPD solution enables customers to quickly evaluate and develop RF transceivers for 4G small cells and Pre-5G massive MIMO systems. Radio design.

Total of 1 lessons29 minutes and 25 seconds

Isolated RS485 transceiver and power supply in small package

Isolated RS485 transceiver and power supply in small package

transceiverLinearPower supply LTM2881Isolator

The new isolator uModule technology developed by Linear Technology creates a complete power and data isolation solution.

Total of 1 lessons7 minutes and 4 seconds

RX Jitter Margin Analysis Demonstration for Xilinx 7 Series Serial Transceivers

RX Jitter Margin Analysis Demonstration for Xilinx 7 Series Serial Transceivers

Xilinxtransceiver

RX Jitter Margin Analysis Demonstration for Xilinx 7 Series Serial Transceivers

Total of 1 lessons3 minutes and 46 seconds

Next generation transceiver technology (20nm)

Next generation transceiver technology (20nm)

transceiver20nm

Altera's next-generation 20-nm family of products introduces a number of industry firsts, including a single-chip 28-Gbps backplane-enabled transceiver, a 40-Gbps chip-to-chip transceiver, and CEI-56G compatible 56-Gbps transceiver The development route of the device has enabled chip-to-chip and chip-to-module applications. These latest innovations triple the switching bandwidth and front-panel port density for fixed-line, military and broadcast applications compared to Altera's current backplane-enabled transceivers, enabling eight lanes of 400-Gbps optical module communications.

Total of 1 lessons1 minutes and 19 seconds

PCI Express Design Using Altera Transceivers

PCI Express Design Using Altera Transceivers

The othertransceiverPCIEPCI Express

Using a simple design flow, you can easily develop PCIe designs with Altera embedded hard IP. This session introduces the key features of PCIe hard IP embedded in Stratix, Arria, and Cyclone family FPGAs.

Total of 2 lessons23 minutes and 1 seconds

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