Computer Architecture (Huazhong University of Science and Technology)

"Computer System Structure" is the core professional course of the first-level discipline of Computer Science and Technology. It has the characteristics of abstract content, rapid content development and changes, rapid changes in knowledge structure, and close integration with technical engineering. In the series of courses of Computer Science and Technology disciplines, It plays an important role in cultivating students' level and quality. The course emphasizes the study of computer systems from the perspective of "overall structure and quantitative analysis", and masters the basic concepts and development history of computer architecture, quantitative analysis methods of computer system performance, design methods of typical instruction systems, architecture and performance optimization methods of instruction pipelines, Storage hierarchy, Cache design and performance optimization methods, understand the input and output system performance and reliability optimization methods, multi-processor system and cluster system architecture, key technologies and main influencing factors of the current mainstream new computer architecture, etc. Discuss in detail the quantitative and qualitative analysis methods, design methods and research methods of computer system structure. The course focuses on deepening students' cognitive ability of the "overall system", effectively enhancing students' computer system design, optimization, and evaluation capabilities, and emphasizing the core concepts of balanced and compromised system design and quantitative thinking methods. The main teaching content of the course pays equal attention to the basics and advanced aspects, echoing the characteristics of complex engineering problems. By mastering the thinking methods of analyzing problems, establishing abstract models, model analysis and optimization, students are trained to have the ability to build complex computer system engineering processes.

• Chapter 1：Definition of computer system structure and course introduction (12 minutes and 35 seconds)

• Chapter 2：Basic knowledge of computer system architecture (9 minutes and 28 seconds)

• Chapter 3：Computer system design content (5 minutes and 46 seconds)

• Chapter 4：Speed ​​up recurring events (10 minutes and 59 seconds)

• Chapter 5：Amdahl's Law (12 minutes and 13 seconds)

• Chapter 6：CPU performance formula (10 minutes and 27 seconds)

• Chapter 7：locality principle (5 minutes and 56 seconds)

• Chapter 8：Technical approaches to improve parallelism (8 minutes and 46 seconds)

• Chapter 9：computer system evaluation (12 minutes and 41 seconds)

• Chapter 10：The development of computer system architecture (6 minutes and 24 seconds)

• Chapter 11：The impact of devices and applications on system structure (6 minutes and 17 seconds)

• Chapter 12：Basic concepts and classification of command systems (13 minutes and 6 seconds)

• Chapter 13：Development and improvement of command systems (13 minutes and 57 seconds)

• Chapter 14：MIPS instruction set (11 minutes and 4 seconds)

• Chapter 15：Basic concepts of assembly line (14 minutes and 45 seconds)

• Chapter 16：Performance indicators of the pipeline (1) (11 minutes and 18 seconds)

• Chapter 17：Performance indicators of the pipeline (2) (14 minutes and 4 seconds)

• Chapter 18：Scheduling of single-function nonlinear pipelines (16 minutes and 57 seconds)

• Chapter 19：Related (12 minutes and 49 seconds)

• Chapter 20：Pipeline conflict (1) (16 minutes and 10 seconds)

• Chapter 21：Pipeline conflict (2) (13 minutes and 9 seconds)

• Chapter 22：Implementation of pipeline (1) (21 minutes and 22 seconds)

• Chapter 23：Implementation of pipeline (2) (13 minutes and 0 seconds)

• Chapter 24：The concept of instruction-level parallelism (14 minutes and 27 seconds)

• Chapter 25：Dynamic scheduling of instructions (12 minutes and 18 seconds)

• Chapter 26：Dynamic branch prediction technology (12 minutes and 1 seconds)

• Chapter 27：Multiple instruction outflow technology (11 minutes and 58 seconds)

• Chapter 28：Instruction Scheduling and Loop Unrolling (14 minutes and 44 seconds)

• Chapter 29：Basic knowledge of storage systems (19 minutes and 23 seconds)

• Chapter 30：Quantitative analysis of storage system performance (7 minutes and 21 seconds)

• Chapter 31：Cache basic knowledge (11 minutes and 8 seconds)

• Chapter 32：Mapping rules and their transformations (14 minutes and 22 seconds)

• Chapter 33：Reduce Cache miss rate (16 minutes and 36 seconds)

• Chapter 34：Reduce cache miss overhead (11 minutes and 0 seconds)

• Chapter 35：Reduce cache hit time (10 minutes and 9 seconds)

• Chapter 36：parallel main memory system (9 minutes and 38 seconds)

• Chapter 37：virtual memory (13 minutes and 22 seconds)

• Chapter 38：Basic concepts and classification of IO systems (4 minutes and 46 seconds)

• Chapter 39：IO system performance and reliability evaluation (9 minutes and 30 seconds)

• Chapter 40：IO system example: RAID (7 minutes and 52 seconds)

• Chapter 41：Selection of example topics (5 minutes and 2 seconds)

• Chapter 42：interconnection network concept (5 minutes and 35 seconds)

• Chapter 43：Internet parameters and indicators (8 minutes and 25 seconds)

• Chapter 44：interconnect function (14 minutes and 29 seconds)

• Chapter 45：Low-dimensional static network (7 minutes and 21 seconds)

• Chapter 46：Hypercubes and pathfinding (12 minutes and 44 seconds)

• Chapter 47：Buses and Crossbars (6 minutes and 52 seconds)

• Chapter 48：Dynamic multi-level interconnection network (6 minutes and 51 seconds)

• Chapter 49：Omega Network and Pathfinding (5 minutes and 27 seconds)

• Chapter 50：multiprocessor background (3 minutes and 3 seconds)

• Chapter 51：multiprocessor concept (9 minutes and 8 seconds)

• Chapter 52：Overall Multiprocessor Challenge (3 minutes and 51 seconds)

• Chapter 53：cache consistency concept (4 minutes and 43 seconds)

• Chapter 54：Consistency Listening Protocol Concept (7 minutes and 12 seconds)

• Chapter 55：Write a direct-to-obsolete consistency protocol (4 minutes and 59 seconds)

• Chapter 56：Write back invalidation listening consistency protocol (7 minutes and 49 seconds)

• Chapter 57：MSI listening protocol implementation (6 minutes and 10 seconds)

• Chapter 58：Synchronization primitives (6 minutes and 15 seconds)

• Chapter 59：Spin lock concept (3 minutes and 6 seconds)

• Chapter 60：Spin lock competition (4 minutes and 12 seconds)

• Chapter 61：Sync performance issues (3 minutes and 46 seconds)

• Chapter 62：fence sync (4 minutes and 37 seconds)

• Chapter 63：Computer system architecture challenges and trends (12 minutes and 9 seconds)

• Chapter 64：Changes in processor chip architecture in the post-Moore era (15 minutes and 57 seconds)

• Chapter 65：Computer Architecture Trend Storage (20 minutes and 48 seconds)

• Chapter 66：Course Summary (1 hours and 4 minutes and 39 seconds)

• Chapter 67：Exercise Lesson—Chapter 1 (5 minutes and 15 seconds)

• Chapter 68：Exercise Lesson—Chapter 3 (48 minutes and 22 seconds)

• Chapter 69：Exercise Lesson—Chapter 5 (20 minutes and 4 seconds)

• Chapter 70：Exercise Lesson—Chapter 7 (15 minutes and 9 seconds)

• Chapter 71：Exercise Lesson—Chapter 9 (17 minutes and 52 seconds)

• Chapter 72：Exercise Lesson—Chapter 10 (2 minutes and 3 seconds)

• Chapter 73：Course experiment (8 minutes and 40 seconds)