Layout of an expandable multi-channel synchronous sampling data acquisition system (DAS) based on DAS AD7606

In power line measurement and protection systems, a large number of current and voltage channels of multiphase transmission and distribution networks need to be sampled synchronously. In these applications, the number of channels ranges from 6 to more than 64. The AD76068-channel data acquisition system (DAS) integrates a 16-bit bipolar synchronous sampling SAR ADC and on-chip overvoltage protection, which can greatly simplify the signal conditioning circuit and reduce the number of components, circuit board area, and measurement protection board costs. The high integration allows each AD7606 to work with only 9 low-value ceramic decoupling capacitors.

In measurement and protection systems, synchronous sampling is necessary to maintain phase information between current and voltage channels in multiphase power line networks. The AD7606 has a wide dynamic range and is an ideal device for capturing undervoltage/undercurrent and overvoltage/overcurrent conditions. The input voltage range can be pin-programmed to ±5 V or ±10 V.

This circuit note details the recommended printed circuit board (PCB) layout for applications using multiple AD7606 devices. This layout is optimized for channel-to-channel matching and part-to-part matching, which helps simplify calibration procedures for high channel count systems. When channel-to-channel matching is important, the circuit can use the AD7606 internal 2.5 V reference; for high channel count applications requiring excellent absolute accuracy, the circuit can use the ADR421 external precision reference, which features high accuracy (B grade: ±1 mV maximum), low drift (B grade: 3 ppm/°C maximum), and low noise (1.75 μV pp typical, 0.1 Hz to 10 Hz). The low noise and excellent stability and accuracy make the ADR421 ideal for high precision conversion applications. The combination of these two devices enables unprecedented levels of integration, channel density, and accuracy.

Circuit Description

The AD7606 is an integrated 8-channel data acquisition system that integrates input amplifiers, overvoltage protection circuits, second-order analog antialiasing filters, analog multiplexers, 16-bit 200 kSPS SAR ADCs, and a digital filter. The circuit shown in Figure 1 includes two AD7606 devices that can be configured to use the 2.5 V internal reference or the 2.5 V external reference ADR421. If the REF SELECT pin is tied to a logic high, the internal reference is selected. If the REF SELECT pin is tied to a logic low, the external reference is selected.

The power supply requirements are as follows: AVCC = 5 V, VDRIVE = 2.3 V to 5 V (depending on the external logic interface requirements).

This circuit note describes the layout and performance of an evaluation board that incorporates two AD7606s to form a 16-channel data acquisition system.

Symmetrical layout of the analog input channels and device decoupling is important to achieve good channel-to-channel matching and device-to-device matching. The data shown supports the matching performance achieved with the 16-channel ADC shown in Figure 1.

Figure 1. 16-channel, 16-bit data acquisition system using two AD7606 8-channel DASs (Simplified schematic; not all connections are shown. See text for detailed connections between devices for channel-to-channel and device-to-device matching testing) [page]

Dual AD7606 Board Layout for 16-Channel DAS

In a system with multiple AD7606 devices, a symmetrical layout is necessary to ensure good performance matching between the devices. Figure 2 shows a layout using two AD7606 devices.

Figure 2. PCB layout of a 16-channel DAS using two AD7606s.

The AVCC voltage plane is routed along the right side of both devices, and the VDRIVE power supply trace is routed along the left side of both AD7606 devices. The ADR421 reference chip is located between the two AD7606 devices, and the reference trace is routed up to pin 42 of U2 and down to pin 42 of U1. Use a solid ground plane. These symmetrical layout principles apply to systems with more than two AD7606 devices. The AD7606 devices can be placed in a north-south direction with the reference voltage in the middle of the devices and the reference trace routed in a north-south direction, similar to Figure 2.

Good decoupling is also important to reduce the supply impedance of the AD7606 and the amplitude of its supply spikes. Decoupling capacitors should be placed close to (ideally right next to) these pins and their corresponding ground pins.

The decoupling capacitors for the REFIN/REFOUT pins and the REFCAPA and REFCAPB pins are important performance-critical capacitors and should be placed as close to the corresponding AD7606 pins as possible. If possible, these capacitors should be placed on the same side of the board as the AD7606 device. Figure 3 shows the recommended decoupling configuration on the top layer of the AD7606 board. The four ceramic capacitors shown are the decoupling capacitors for the REFIN/REFOUT pins, the REGCAP pins, the REFCAPA pins, and the REFCAPB pins. These capacitors are placed in a north-south direction so as to be as close as possible to the corresponding pins. [page]

Figure 3. Top-level decoupling showing decoupling capacitors for the two REFCAPA pins, the REFIN/REFOUT pin, and the REFCAPA/B pin.

Figure 4 shows the bottom-layer decoupling configuration used to decouple the four AVCC pins and the VDRIVE pin. Multiple vias are used to connect the pins to their corresponding decoupling capacitors. Symmetrical placement of the decoupling capacitors around the AD7606 device facilitates performance matching between the devices. Multiple vias are used to connect the capacitor pads and the pin pads to ground and to the voltage plane and reference voltage traces.

Layout Considerations for a Scalable Multichannel Simultaneous Sampling Data Acquisition System (DAS) Based on the AD7606 16-Bit 8-Channel DAS (CN0148)

Figure 4. Bottom-layer decoupling, showing the decoupling capacitors for the four AVCC pins and the VDRIVE pin.

Channel-to-Channel Matching for 16-Channel Systems

In high channel count systems, good channel-to-channel and device-to-device performance matching can greatly simplify calibration procedures. Symmetrical layout of the AD7606 devices, analog input channels, and decoupling capacitors helps to match performance between multiple devices. Using a common system reference voltage will further enhance the matching performance of the system. Figure 5 shows the circuit configuration used to measure the performance matching between 16 channels on the board when all inputs are grounded. There are also distribution histograms of up to 7 codes, with each channel histogram centered at code 0, as shown in Figure 6.

Layout Considerations for a Scalable Multichannel Simultaneous Sampling Data Acquisition System (DAS) Based on the AD7606 16-Bit 8-Channel DAS (CN0148)

Figure 5. Schematic diagram of a circuit used to test channel-to-channel matching in a 16-channel system using two AD7606s and an external ADR421 reference with all inputs grounded.

Figure 6. Histogram of the circuit in Figure 5 showing the channel-to-channel matching performance of a 16-channel system using the ADR421 external voltage reference.

AD7606 internal reference is used as system reference

The AD7606 has an internal 2.5 V reference that is internally amplified to provide a buffered reference voltage of approximately 4.5 V for the AD7606 ADC. In high channel count applications where channel-to-channel and device-to-device matching is critical, the internal reference of one AD7606 can be used to provide the reference voltage for another AD7606 device. In this configuration, U1 is configured to operate with the internal reference voltage, as shown in Figure 7.

Figure 7. Schematic diagram of a circuit used to test the channel-to-channel matching of an AD7606, using the internal reference voltage source of U1.

The AD7606 U2 device can be configured to operate in external reference mode. The 2.5 V reference voltage provided by the U1 REFIN/RFOUT pin is routed to the REFIN/REFOUT pin of U2. A 10 μF decoupling capacitor is located at the REFIN/REFOUT pin of the AD7606 device. On the AD7606 U1 and U2, the REFCAPA and REFCAPB pins are shorted together and decoupled to GND with a 10 μF ceramic capacitor.

Both AD7606 devices are operating at a sampling rate of 200 kSPS, and a 7.5 V dc signal is applied to V1 and V2 of U1, as shown in Figure 7. A histogram of the codes is shown in Figure 8. The average output code differs by 1.2 codes between channels of the same device. All 16 channels on the board are converting at 200 kSPS.

Figure 8. Histogram of the circuit shown in Figure 7.

A 7.5 V signal is applied to V1 of U1 and V1 of U2, and all 16 channels on the board operate at 200 kSPS, as shown in the configuration circuit schematic in Figure 9. A histogram of the codes is shown in Figure 10. The average output code differs by 1.4 codes between the V1 channels of different devices.

Figure 9. Schematic diagram of a circuit used to test the inter-device matching between two AD7606s. The internal reference of U1 is used as the system reference.

Figure 10. Histogram of the circuit shown in Figure 9.

When the internal reference of an AD7606 is used as the system reference, the above histogram shows very good matching between channels of an AD7606 device and between channels of multiple devices. [page]

Absolute accuracy

In addition to channel-to-channel matching and device-to-device matching, if the absolute accuracy of the ADC conversion results is also very important, an external tight tolerance, low drift reference should be used as the system reference. In this circuit, the ADR421 2.5 V reference is used as the system reference.

The reference voltage applied to the AD7606 device affects the ADC output code:

The actual ideal code value will vary over temperature depending on the temperature coefficient characteristics of the system reference. In applications where absolute accuracy is critical, or where it is desirable to avoid complex temperature calibration procedures to achieve absolute accuracy and channel matching, a tight tolerance, low drift 2.5 V reference such as the ADR421 should be used as the system reference for the AD7606 device.

A 7.5 V DC voltage is applied to the inputs (V1 and V2) of U1, using an external reference voltage source, as shown in the circuit of Figure 11. The code histograms of the two channels of U1 are shown in Figure 12. The code histogram averages of the two channels differ by 0.9 LSB.

Figure 11. Schematic diagram of a circuit used to test the channel-to-channel matching of an AD7607 using an external reference.

Figure 12. Histogram of the circuit shown in Figure 11. [page]

In the circuit shown in Figure 13 for testing device-to-device matching, a 7.5 V dc signal is applied to the V1 channels of the U1 and U2 AD7606 devices, and an external reference is used. The code histograms of the two V1 channels of the two AD7606 devices are shown in Figure 14. All 16 channels on the board are operating at a throughput rate of 200 kSPS. The difference in the mean of the code histograms between the V1 channels of U1 and U2 is 0.6 LSB.

Figure 13. Schematic diagram of a circuit used to test the matching between two AD7606 devices using an external voltage reference.

Figure 14. Histogram of the circuit shown in Figure 13.

The above histograms show that the histogram mean matching between one AD7606 device and the histogram mean matching between multiple AD7606 devices are less than 1 LSB when using the ADR421 external system reference.

in conclusion

This layout ensures good channel-to-channel matching with one AD7606 and good part-to-part matching between multiple AD7606s on the same PC board. Symmetrical layout of the AD7606 devices, especially the decoupling capacitors, will help achieve good channel-to-channel matching and part-to-part matching. In high channel count systems, good channel-to-channel and part-to-part performance matching means that calibration procedures are simplified.