Data Acquisition System Based on TMS320VC5410 and TLV1571

When using DSP for digital signal processing, it is usually necessary to use a sampling circuit to sample the analog signal, and then use an A/D converter to convert it into a digital signal for data processing. Here is a signal acquisition system composed of TLV1571 and TMS320VC5410[1].

1 TLV1571 Introduction:

In the peripheral circuits of DSP, A/D converter is more important. Based on different applications, chips with different performance indicators and prices can be selected. The selection of general A/D converter mainly considers: conversion accuracy, conversion time, and converter price.

Here we choose a 10-bit parallel A/D converter TLV1571 specially made by TI for DSP. The equivalent maximum sampling frequency achieved by the given CLK frequency of this device is (1/16) fCLK.

1.1 Internal structure and pin definition of TLV1571:

The internal structure and pin function definition of TLV1571 are shown in Figure 1 and Table 1.

The TLV1571 operates from a single power supply of 2.7 to 5.5 V and can accept analog input voltages of 0 to 3.3 V, digitizing the input voltage at a rate of 625 Kb/s. At 5 V, the input voltage is digitized at a maximum rate of 1.25 Mb/s. This A/D converter has the characteristics of high speed, simple interface, and low power consumption, making it an ideal choice for high-speed digital signal processing that requires analog input.

1.2 Initialization of TLV1571:

After power-up, INT/EOC is initially high and must be low to start an I/O cycle. The TLV1571 requires two write cycles to configure the two control registers. The first conversion after returning from a power-down state may be invalid and should not be considered.

1.3 TLV1571 control register control word settings:

The control register format of TLV1571 is shown in Table 2. It can be configured by software. Its two most significant bits D9 and D8 are used for register addressing, and the remaining 8 bits are used as control data bits. All register bits are written to the control register at the same time during the write cycle. The user can configure two control registers CR0 and CR1. For control register 0 (CR0), A1: A0 = 00, and its configuration is shown in Table 3; for control register 1 (CR1), A1: A0 = 01, and its configuration is shown in Table 4.

By changing the control word of the control register, the working mode of TLV1571 can be selected. The clock source can be selected by configuring CR0.D5. For the selection of clock source, there are internal clock and external clock. It has an internal 10 MHz oscillator.

By configuring CR1.D6, the operating speed of the built-in oscillator can be selected to be (10±1) MHz or (20±2) MHz. There are also two output modes: binary output and complement output.

In single-channel input mode, CR0.D3 = 0, CR1.D7 = 0; In software startup mode, CR0.D7 = 1; In internal clock source mode, CR0.D5 = 0; When the internal clock source oscillation frequency is set to 20 MHz, CR1.D6 = 1; In binary output mode, CR1.D3 = 0. Therefore, the final control register control word is: CR0 = 00C0H, CR1 = 0140H. In single-channel software startup, sampling is initially started by the rising edge of WR, and sampling occurs at the rising edge of RD; Conversion starts 6 clock cycles after sampling starts. In INT mode, an INT pulse is generated after each conversion; In EOC mode, conversion starts, EOC changes from high level to low level, and changes back to high level after conversion.

1.4 TLV1571 self-test:

TLV1571 provides three self-test modes. When these self-test modes are used, the A/D converter itself can be checked to see if it is working properly without providing external signals. These three self-test modes are controlled by writing CR1 (D1, D0), as shown in Table 5. In addition, when CR1.D2 = 1, CR1 (D1, D0) = 0, the control word written to the CR0 control register is output; when CR1.D2 = 1, CR1 (D1, D0) = 1, the control word written to the CR1 control register is output, which can also be used to test and verify whether the control word is correctly written to the control register and whether the A/D converter is working properly.

2. Interface connection and debugging:

2.1 Interface between TLV1571 and TMS320VC5410:

The interface connection between TLV1571 and TMS320VC5410 is very simple, as shown in Figure 2. This system does not use the hardware-start sampling control method, but uses the software-start control method. The clock signal also uses the internal clock of the A/D converter. If an external clock input is required, the DSP can provide an accurate clock signal that can be controlled and changed as needed. This design uses a query method to read the converted data. In addition, when designing the circuit, it should be noted that when the power supply voltage is 3 V, the sampling speed provided by TLV1571 is 625 ks/s, and its power consumption is 12 mW; when the power supply voltage is 5 V, it provides a sampling speed of 1.25 Ms/s and a power consumption of 35 mW.

2.2 System debugging:

When debugging this system, the debugging of the I/O space outside the DSP basically only involves how to select the space, how to get or read data from the external space, and how to establish a handshake signal with the external space. However, attention should be paid to the timing coordination between the DSP and peripheral devices. Especially for the reading of data line signals, when there are multiple devices in the system sharing the DSP data line, the timing coordination of each device must be handled well. The data line of the device in the non-working state is in a high-impedance state to avoid affecting the data reading and writing of the device in normal working state. The following issues should be noted during the debugging of TLV1571: 1) The two status words of TLV1571 must be correctly written to the A/D. The data can be read once after writing to confirm the correctness of the written data, or a circular writing method can be used to observe the two written pulse signals with an oscilloscope. In addition, the control word written into the CRO and CR1 control registers can be read to determine whether the control word is correctly written into the control register of TLV1571, and whether the device is working properly; 2) The read and write signals of TMS320VC5410 have only one address line, so the XF pin must be used to control the read signal of TLV1571, and the XF pin must be controlled by software to output the signal to TLV1571 after each data read by the DSP, otherwise the A/D will no longer sample. In addition, if DSP timer interrupt is used to read data, when setting the timer interrupt, as long as the interrupt interval is greater than the number of sampling cycles required by the TLV1571 operating frequency, the EOC signal can be read directly without the query method, and then the sampled data can be read directly, and then the XF output signal can be controlled to enable it to perform the next sampling operation; 3) TLV1571 cannot sample negative voltage signals. If a negative voltage signal must be sampled, a DC signal can be artificially introduced to raise the negative voltage to a positive voltage, and the DSP must subtract the introduced DC signal from the sampled signal; 4) In order to verify whether the sampling signal is correct, the time domain or frequency domain diagram of the sampled data can be drawn under CCS.

3 Conclusion:

The experiment proves that the system can meet the sampling and processing of general high-speed real-time signals, and verifies that the system can reach a maximum sampling speed of 1.25 Ms/s under a single channel, and by adjusting the DSP timing interrupt time, various sampling speeds below the maximum sampling frequency (1.25 Mb/s) of the system can be easily obtained, which can flexibly meet a variety of applications. In addition, this system supports up to 8 channels of high-speed real-time data signal acquisition. By configuring the correct A/D converter control words CR0 and CR1, the number of input signals can be easily adjusted without changing the hardware circuit. In the actual experiment, this system was made into a minimum system. By modifying and adding the required devices, this system can be made into a variety of special data acquisition systems.