Design of high performance floating point DSP chip and its minimum system

Publisher:sdlg668Latest update time:2010-07-12 Source: 电子技术应用Keywords:TMS320C6713 Reading articles on mobile phones Scan QR code
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TMS320C6713 is a new 32-bit floating-point DSP chip developed by Texas Instruments (TI) after the TMS320C62X series of fixed-point DSP chips. The internal structure of this chip is improved on the basis of TMS320C62X and has the following revolutionary features:

(1) Fast processing speed, with a maximum operating frequency of 300 MHz and a peak computing power of 2,400 MIPS/1,800 MFLOPS;

(2) Hardware supports 32-bit single-precision and 64-bit double-precision floating-point operations in IEEE format;

(3) Integrated 32×32 bit multiplier, the result can be 32 bit or 64 bit;

(4)TMS320C62X instructions can run on TMS320C6713 without any changes.

1 Structural features

TMS320C6713 is a high-speed floating-point DSP newly launched by TI. It has a main frequency of 200 MHz and a single instruction execution cycle of only 5 ns. It has powerful fixed-point and floating-point computing capabilities and a computing speed of up to 1 600 MIPS/1 200 MFLOPS. Compared with other series of TMS320 DSPs, the most important feature of the C6000 series DSPs is that it adopts the VelociTI very long instruction word VLIW (Very long Instruction Word) structure in the architecture. In the VLIW architecture, a very long machine instruction word drives multiple internal functional units (this is also the origin of the name VLIW). Each instruction word contains multiple fields (instructions), which are independent of each other and each controls a functional unit. Therefore, multiple instructions can be issued in a single cycle, achieving high instruction-level parallel efficiency. The C6000 VLIW adopts a RISC-like instruction set, uses a large unified register stack, has a regular structure, has potential easy programming and good compilation performance, and can play a good role in the field of scientific applications.

TMS320C6713 is a DSP chip that supports floating-point operations. It is a long-instruction, multi-functional DSP chip designed by Texas Instruments for high-end processing. Its internal structure and functional modules are shown in Figure 1. It mainly includes three parts: central processing unit CPU, on-chip memory and on-chip integrated peripherals.

1.1 Functional Units of the CPU Core

The CPU of TMS320C6713 is the latest DSP chip adopting VelociTI architecture. VelociTI is a high-performance, advanced VLIW structure. Multiple functional units work in parallel and share a common large register group. Various operations performed simultaneously are synchronized and coordinated by the VLIW long instruction dispatch module. This structure makes it the preferred device for multi-channel, multi-function and high-performance applications. The CPU core, as the operation and control center of the DSP chip, includes the following parts: (1) program instruction fetch unit, instruction dispatch unit, and instruction decoding unit; (2) two data channels A and B, each channel includes a register group consisting of 16 32-bit registers and 4 functional units: ① arithmetic and logic operation unit (.L) ② branch, bit operation and arithmetic operation unit (.S) ③ multiplication operation unit (.M) ④ load/store and arithmetic unit (.D); (3) control register; (4) control logic; ⑸ test, online simulation interface and interrupt control.

1.2 On-chip Memory

The internal memory of the TMS320C6713 chip adopts a two-level cache structure, as shown in Figure 1, including: 4 KB of the first-level high-speed program cache (L1P), 4 KB of the first-level high-speed data cache (L1D), and a total of 256 KB of on-chip storage capacity in the second level (64 KB of L2 unified cache/mapped RAM and 192 KB of additional L2 RAM).

Both TMS320C6713 and TMS320C6713B use a double-layer cache structure, which has a strong external driving capability. The first layer is a 4 KB program buffer and a bidirectionally addressable data buffer, and the second layer has 256 KB of program and data buffers, of which 64 KB is the storage area and the rest is the SRAM area. This unique secondary cache structure greatly improves the CPU's working efficiency.

1.3 On-chip integrated peripherals

The TMS320C6713 chip integrates many peripheral device interfaces, which can easily connect to external memory, host, serial devices and other peripherals. All external interfaces are composed of some signal lines and control registers. The main work of developers in interface design is to complete the interface connection and write control registers, making it easier to expand peripherals.

The C6713 chip integrates a 32-bit external memory interface EMIF (External Memory Interface), which can expand 8-bit, 16-bit, and 32-bit parallel memories. The internal 16 independent extended direct memory access channels EDMA (Enhanced Direct-Memory-Access) greatly improve the efficiency of memory access. EDMA is oriented to real-time signal processing and can efficiently complete the transfer of data in the storage space in the CPU background. It has a high transmission rate. The data transmission rate of C621x and 671x can be as high as 1 200 MB/s. 2 McASP (multichannel audio serial port); 2 McBSP (multichannel buffered serial port), which can simulate almost all forms of serial interfaces; 2 I2C bus interfaces; 2 32-bit general-purpose timers; 16-channel general-purpose I/O port GPIO (general-purpose input/output); a 16-bit host interface HPI (Host-Port Interface); also includes program and data memory controllers, interrupt controllers, timers, clock generators, PLL (phase-locked loop control generator) and power-down logic and other functional units.

2 TMS320C6713 DSP Hardware Minimum System Design

TMS320C6713 (main frequency 225 MHz) is a typical and widely used DSP chip in the C67X series. The main functions of its minimum hardware system include: basic signal acquisition, data calculation and data and program storage; audio signal acquisition, processing, input and output; communication with the host and data and program transmission. It is also equipped with an external expansion interface to facilitate the expansion of system functions to achieve a wider range of embedded applications. The above main functions are divided into functional modules as shown in Figure 2: audio processing module, data processing module, power conversion and power supply module.

2.1 Audio Processing Module

In the audio processing module, this system uses the audio processing chip TLV320AIC34 produced by TI, which is a high-performance stereo audio codec and integrates a high degree of analog functions. It is equipped with related auxiliary circuits to complete the initial processing of audio signals. It has two input modes: microphone input and audio line input, and two output modes: audio line output and speaker output. The audio signal collected by the audio processing chip TLV320AIC34 is modulated by the DSP chip or itself and then transmitted to the computer host, or the signal processed by the DSP chip is directly transmitted by TLV320AIC34.

2.2 Data Processing Module

In the data processing module, the DSP chip, program memory and data memory in the system are the core of the entire module circuit. The function of this module is to use the EMIF (external memory interface) of the DSP chip to complete the data transmission with the external data memory (SDRAM) and the program reading and writing tasks of the program memory (FLASHROM), so as to realize the real-time calculation, processing and storage of data; it has the function of hardware interrupt and reset; and it is connected to the hardware emulator through the JTAG interface circuit and then connected to the computer host to realize data communication with the computer; it uses McBSP (multi-buffered serial port) to complete the serial data reception and transmission work, and realize the control and data exchange functions of the audio processing module. At the same time, it also processes the unused pins of the DSP chip and leads them all out to provide a basis for the expansion of future functions.

2.3 Power supply module

In the power supply module, in order to achieve a good match between hardware, this system uses two power supply chips TPS54350 from TI. Its input voltage is 5 V, which provides 3.3 V power supply voltage for the audio processing module and the data processing module, and 1.26 V chip core voltage for the data processing module. It also has power-off reset and automatic reset functions when the power supply voltage cannot reach the rated value.

3. TMS320C6713 Hardware Minimum System PCB Design Considerations

3.1 Considerations for PCB design of audio processing module

The audio processing module mainly completes the acquisition and processing of audio signals. The TLV320AIC34 audio processing chip performs preliminary processing on the acquired signals and can also transmit the signals to the DSP chip for further processing. When laying out the components, pay attention to the following points:

(1) The four analog signal plugs are arranged at the edge of the circuit board. The resistors and capacitors in each channel transmission process should be properly placed on the corresponding signal transmission channel. When the processed signal is pulled into the corresponding pin of the audio chip, the routing distance should not be too far to avoid unnecessary interference.

(2) Use two layers of circuit boards for routing, with analog and digital signals on the top layer, and the bottom layer is mainly used for large-area grounding to shield signals. Completely separate analog signals from digital signals into two different areas to avoid mutual interference.

3.2 Data Processing Module PCB Design Considerations

As a high-frequency data processing module with DSP chip as the core, we should be more cautious when designing PCB, and pay attention to the following points:

(1) Considering the smooth flow of signal routing and the least interference possible, the layout of the circuit board layer should be designed in layers. To this end, two power layers DSPIO_3.3 V, DSP_CVDD and a ground layer GND are set up. In addition, three signal layers are set up and ensure that they are as close to the ground layer as possible to achieve the best signal transmission quality.

(2) When laying out components, the distance between the DSP chip and the memory should be kept as close as possible, which can reduce board manufacturing costs and avoid the signal line being interfered by parasitic inductance due to long routing, which will reduce the quality of the signal or even cause it to fail completely. Therefore, the resistor should be as close to the memory as possible to ensure reliable and stable signals.

(3) For the JTAG module, it includes a standard 14-pin socket and unused EMU2-EMU5 pins, and the settings for the simulation and boundary scan working modes. All three parts are brought out in the form of a standard socket and placed as close to the edge as possible on one side of the circuit board.

(4) During the routing process, try to keep the length of the signal line approximately equal, so as to ensure the synchronization of signal transmission as much as possible and avoid delay. The routing should be in one direction as much as possible, and try to avoid frequent turns to prevent the quality of the transmitted signal from being affected. Secondly, the unused pins should be led out into two standard 2×20 sockets according to their functions.

3.3 Power Conversion and Power Supply Module PCB Design Considerations

The power conversion and power supply module mainly provides two voltages, DSPIO_3.3 V and DSP_CVDD. A two-layer circuit board is used in the design to realize the function of the power conversion and power supply module. Specifically, the surface layer is used for power and signal layer routing. All signal wiring is arranged on the surface layer as much as possible, and a small number of signal lines are routed on the bottom layer. The bottom layer is mainly used as a grounding layer, and a large area of ​​grounding is processed. At the same time, a large number of holes are punched nearby for the grounding part of the surface layer, and the grounding signal is directly connected to the bottom layer for grounding. According to its working principle, the 5 V voltage is divided into two channels for conversion. When routing, pay attention to the routing width of the power line and the channel to meet the current requirements, and also pay attention to the interference of electromagnetic noise signals.

TMS320C6713 is a new floating-point DSP chip developed by Texas Instruments, USA, with very high operating speed, integration and good scalability. Due to its excellent computing power, efficient instruction set, intelligent peripherals, large-capacity on-chip memory and wide-range addressing capability, it is suitable for applications with high requirements for computing power and storage. In particular, it has a wide range of applications in professional audio products, mixers, audio synthesizers, instrument/amplifier modeling, audio conferencing and broadcasting, biometrics, medical, industrial, digital imaging, speech recognition and grouping.

Keywords:TMS320C6713 Reference address:Design of high performance floating point DSP chip and its minimum system

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