The motor control algorithm SWC includes the motor control strategy. The motor control algorithm used in this paper is the field vector oriented control FOC (Field Oriented Control, FOC). The control block diagram is shown in Figure 2.4. The block diagram is functionally divided into different levels, corresponding to the layered architecture of the application layer APP, the basic software layer BSW and the real-time running environment layer RTE. It can be seen that the division of the layered architecture realizes the separation of motor control software and hardware, allowing software developers to focus on system software design without considering hardware-related issues. The safety monitoring SWC is designed for running entities such as motor overcurrent protection, overtemperature protection, and rotor position monitoring. If you need to add and upgrade functions in the future, you only need to add and modify the corresponding software components and running entities, thereby avoiding the complexity caused by cross-coupling between software.
The design of the application software layer is modeled using the Matlab/Simulink environment. The model is built according to the designed software components and their running entities. The Simulink/Configuration Parameters-Code Generation is used to generate software code for corresponding configuration. Then the corresponding code files can be added to the system engineering in the Tasking compiler.
6. Basic Software Layer Design (BSW)
The basic software layer provides infrastructure services to the application layer software, including peripheral driver services, memory management services, communication services, etc., and is a bridge between the application layer and the microcontroller. This system is a drive motor control system. The basic software layer structure diagram is shown in Figure 2.5, which includes peripheral drivers, services, and communications. Among them, the peripheral driver encapsulates the various functional peripherals of the microcontroller for developers to call, such as PWM driver, ADC driver, CAN driver, IO driver, etc. related to motor control; services include storage services and watchdogs and timers related to system services; in addition, it also includes the design of communication protocols related to data communication.
This paper uses Infineon AURIX series three-core microcontroller TC297 as the hardware development platform, and develops and designs the basic software layer of the system based on Infineon's underlying driver software. Among them, the AURIX series chip is a high-performance 32-bit microcontroller launched by Infineon that meets the automotive industry standards (such as AUTOSAR standard, ISO26262), integrating three CPU cores, with a main frequency of 300MHz, and can be used in various occasions such as automotive engine control, electric/hybrid vehicles, chassis, braking systems, electric power steering systems and advanced driver assistance systems. The TC297 microcontroller selected in this paper has rich peripheral resources and powerful data processing capabilities, which can fully meet the needs of automotive motor control.
The controller peripheral modules related to the system and motor control include CCU6, GTM, ADC, GPIO, ASCLIN, etc., which are mainly used to realize PWM drive, AD sampling, IO signal input and output, communication and other functions. Among them, CCU6 is a 16-bit high-resolution capture and comparison unit with a specific application mode, mainly used for AC drive control. Special operation modes support brushless DC motors using Hall sensors or back-EMF detection.
In addition, block rectification and control mechanisms for multi-phase motors are supported. It also supports the synchronous start of several timers, an important feature for devices containing multiple CCU6 modules.
The control of permanent magnet synchronous motor requires six PWM waves to drive the three-phase inverter. The multi-channel timer T12 output module of timer CCU6 can be used to generate three-phase six-channel center-symmetrical PWM waves. In addition, in order to meet the synchronous sampling of three-phase current, a timer is required as a synchronous trigger signal Trigger to trigger AD sampling. In this way, the CCU6 module requires two timers, T12 and T13.
The VADC analog-to-digital conversion module contains 8 independent conversion units, each of which contains 8 input sampling channels, and the AD sampling conversion time is less than 1μs. In motor control, the three-phase current needs to be sampled synchronously, and the synchronous conversion function of the VADC module can support the synchronous conversion of up to four sampling channels. Therefore, the conversion unit of the VADC can be used for synchronous sampling conversion to achieve synchronous sampling of the motor phase current. At the same time, the AD sampling frequency must also be consistent with the PWM frequency. Using hardware to trigger AD sampling can reduce software overhead and reduce CPU load rate. The Trigger reserved in the T13 design above can be used as a trigger signal to trigger AD sampling.
The underlying driver software encapsulates the register configuration of each peripheral function module of TC297 in the form of structure and function. From a timer to the generation of three-phase drive PWM wave, it can be realized by manually writing registers. The register configuration of related PWM output is encapsulated in the form of structure and function for developers to call. By calling the structure and function of CCU6 module PWM configuration and assigning relevant parameters such as frequency, dead time, complementary channel logarithm, etc., the PWM wave configuration required for motor control can be completed. When configuring AD current sampling, the VADC module initialization function can be used to realize the initialization configuration of the conversion unit and sampling channel of AD sampling, including the setting of synchronous conversion channels related to current sampling and the setting of AD sampling result interrupt.
We encapsulate the decoding work of the resolver into a CDD module, which mainly handles the feedback data settlement of the resolver decoding chip.
7. Design based on real-time runtime environment (RTE)
After completing the design of the application layer software and the basic software layer, it is necessary to define relevant interface functions in the real-time operating environment layer to realize the transmission and call of data between the application layer software components and between the application layer and the basic software layer. First, it is necessary to clarify the input and output data of the application layer software and define the corresponding data types. The input and output related data of each software component are listed. After building the model in Matlab/Simulink, the generated program code encapsulates the input and output data in the form of a structure; the input and output data in the basic software layer are defined in the relevant structure in the underlying software. After completing the data definition of each software layer, the corresponding input and output data are assigned in the interrupt service program to realize the data transmission between the application layer and the basic software layer.
Among them, the application layer software generates code by building various running entity models in Matlab/Simulink and completing relevant simulation tests. The basic software layer uses the underlying driver software driver to design and implement the initialization of each peripheral driver, and includes the corresponding configuration of communication protocols and interrupt services; data communication and service calls are implemented by defining relevant interface functions in the real-time operating environment layer. The specific design and implementation of AUTOSAR-based motor control software is completed through the above method. Finally, the software of each layer is imported into the Tasking development environment, and all programs are integrated and linked in the compiler to generate executable files. The generated executable files are added to the debugging software Lauterbach/UDE to debug and analyze the software. According to the analysis results, the software can be further optimized.
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