Innosilicon releases China's first physical layer chiplet solution compatible with UCIe standards

In April 2022, Innosilicon, a leading one-stop IP and chip customization and GPU-enabled company in China, announced that it would be the first to launch a domestically developed IP solution with a physical layer compatible with the UCIe standard - Innolink™ Chiplet . It is reported that this is the first cross-process and cross-package chiplet connection solution in China, and it has been successfully verified in mass production on advanced processes.

Less than three weeks after Intel and ten other industry giants jointly launched UCl in early March, Innolink Technology launched a domestically developed IP solution with a physical layer compatible with the UCIe standard. Gao Zhuan, technical director of Innolink and chiplet architect, said: "Innolink Technology has been working in the field of chiplet interconnection technology for many years and has accumulated a lot of experience in customer application needs. It has close technical communication and cooperative exploration with industry leaders such as Intel, TSMC, Samsung, and Micron. We started the research and development of Innolink™ more than two years ago, and first disclosed the Innolink™ A/B/C technology to the industry at the 2020 Design Reuse global conference, and took the lead in clarifying the DDR-based technical route of Innolink™ B/C . Thanks to the correct technical direction and advanced layout planning, the physical layer of Innolink™ is consistent with the UCIe standard, and eventually became the first domestic and world-leading chiplet solution compatible with the UCIe standard."

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The senior expert said, "When UCl was released, we noticed that the UCIe specification has two specifications: standard packaging and advanced packaging. These two specifications are very similar to Innolink™ B and C of Innosilicon in terms of ideas and technical architecture. Both define IO interfaces separately for standard packaging and advanced packaging, and both are single-ended signals, forward clocks, data valid signals, and side band channels. Based on Innolink™ B/C, Innosilicon quickly released IP products compatible with both UCIe specifications, which can empower domestic and foreign chip design companies and help them quickly launch chiplet products compatible with the UCIe standard."

According to the senior experts, around the Innolink™ Chiplet IP technology, Innosilicon also provides a complete set of solutions including packaging design, reliability verification, signal integrity analysis, DFT, thermal simulation, and testing solutions.

Why can Innosilicon accurately grasp the direction of chiplet technology and complete design verification in a forward-looking manner, which is consistent with the direction of UCIe technology launched later? In the view of the Institute of Advanced Technology, this is inseparable from Innosilicon's deep accumulation in the field of chiplet technology and its continued leadership in authorized mass production. "The technology behind Innolink™ is extremely complex, but Innosilicon has mastered the world's leading core technologies such as high-speed SerDes, GDDR6/6X, LPDDR5/DDR5, HBM3, substrate and Interposer design solutions, high-speed signal integrity analysis, advanced process packaging, and testing methods. After a large number of customer needs have been implemented and mass production verification has been iterated, Innosilicon can 'read widely and select carefully, accumulate a lot and then release a little'."

It is understood that Innosilicon's Chiplet connection solution has been successfully verified in mass production on advanced processes , supporting the heterogeneous implementation of high-performance CPU/GPU/NPU chips. At the end of November 2021, Innosilicon Technology released the country's first 4K multi-channel high-performance graphics card - the "Fenghua No. 1" GPU . The Type B card uses Innolink™ Chiplet technology to cascade multiple GPUs, doubling the performance.

What impact does the establishment of the UCIe Alliance have on chiplet technology? In the view of the experts, UCIe, based on the DDR technology route, is an open, industry-wide high-speed interconnection standard for chiplets. It can achieve package-level interconnection between small chips, and has the advantages of high bandwidth, low latency, low cost, low power consumption, and strong flexibility. It is unique in technology and realizes interconnection through standardization. It can meet the growing demand for computing power, memory, storage, and interconnection in the entire computing field, including cloud, edge, enterprise, 5G, automobile, high-performance computing, and mobile devices. "In layman's terms, UCIe is a unified standard chiplet with the ability to package and integrate different dies. These dies can come from different wafer fabs or use different designs and packaging methods. This standard is very meaningful to the open prosperity of chiplets. It achieves stronger empowerment through the unification of interface technology routes."

The senior expert believes that "Chiplet technology is of great strategic significance for breaking through the computing power bottleneck of large computing chips such as AI and CPU/GPU. It is also one of the key technologies to solve the problem of wafer process bottleneck in my country's high-quality development process." He gave an example, "You can see that both the Ponte Vecchio chip presented by Intel at ISSCC 2022 and the M1 Ultra chip released by Apple a few days ago use chiplet technology, and AMD's Chiplet CPU has also been proven to be a very successful product."

The High Commissioner called for that, as of now, the UCIe specification is more suitable for the application scenarios of chiplets in both the software protocol layer and the physical layer. Domestic companies can actively participate in the UCIe ecosystem and actively launch competitive UCIe-based products. "In the long run, domestic chip companies need to continuously enhance their strength in the field of high-performance computing chips, work together, and come up with first-class chiplet products. When our chip products and chip ecosystem are strong enough, participating in the formulation of specifications will be a natural thing."