Circuit protection techniques and board layout strategies can help improve safety, reliability, and connectivity. Wearable technology has a weakness that is unlikely to exist in the IoT: the static electricity generated by the human body as it moves. Static electricity can damage the sensitive electronic devices that underpin IoT applications.
To understand this problem, we start with the human body model (HBM), which is used to describe the sensitivity of integrated circuits to electrostatic discharge (ESD) damage. The most commonly used HBM concept is the test model defined in the military standard MIL-ST D-883, Method 3015.8, Electrostatic Discharge Sensitivity Classification. A similar international HBM standard is JEDEC JS-001. In both JEDEC JS-001 and MIL-STD-883, a 100pF capacitor and a 1.5kΩ discharge resistor are used to simulate a charged human body. In the test, the capacitor is fully charged over a voltage range of 250 V to 8 kV and then discharged through a 1.5kΩ resistor in series with the device under test.
Since wearable devices are designed to be worn next to the body, they are constantly exposed to static shocks generated by close interaction with the user. Without proper protection, the sensor circuits, battery charging interfaces, buttons, or data input/output ports of wearable devices may be damaged by electrostatic discharge (ESD) of a similar magnitude to that generated in HBM testing. Once a wearable device fails, the functionality and reliability of the entire network will also be affected.
Advanced circuit protection techniques and board layout strategies can protect wearable devices and their users. Applying these recommendations early in the design process will help circuit designers improve the performance, safety, and reliability of their wearable technology designs and help build a more reliable Internet of Things.
1 Although the package size is small, the ESD protection effect is not small
One design challenge for circuit protection in wearable devices is that the size of wearable devices is getting smaller and smaller. In the past, large structure diodes and large package sizes were required.
Designers should choose unidirectional diode configurations whenever possible because they perform better during negative voltage ESD strike events. During a negative voltage ESD strike, the clamping voltage will be based on the forward bias voltage of the diode (typically less than 1.0 V). Conversely, the clamping voltage provided by a bidirectional diode configuration during a negative voltage strike is based on the reverse breakdown voltage, which is higher than the forward bias voltage of a unidirectional diode. Therefore, a unidirectional configuration can greatly reduce the stress on the system during a negative voltage strike.
Properly determine the diode location. Most wearable designs do not require board-level TVS diodes on every IC pin. Instead, designers should determine which pins are exposed to possible user-generated ESD events. If the user has access to the communication/control lines, this can be a pathway for ESD to enter the IC. Typical circuits prone to this pathway include USB, button/switch controls, and other data buses. Because of the board space required to add these discrete devices, devices that can fit into 0201 or 01005 packages are needed. For some wearable applications, space-saving multi-channel arrays can be used. Regardless of the package type, the ESD suppressor should be located as close to the ESD source as possible. For example, protection for a USB port should be close to the USB connector.
Shorten trace lengths. Trace routing is very important in the design of TVS diode protection for IC pins. Unlike lightning transients, ESD does not release large amounts of current for a long time. When dealing with ESD, it is important to transfer the charge from the protected circuit to the ESD reference point as quickly as possible.
The primary factor is the trace length from the signal line to the ESD device and from the ESD device to ground, not the trace width of the ground. To limit parasitic inductance, the trace length should be as short as possible. Parasitic inductance can cause induced overvoltage, which is a short voltage spike that can reach hundreds of volts if the stub is long enough. Recent packaging technology advances include μDFN outlines that can be mounted directly on the data lanes, eliminating the need for stubs.
Understand the definitions of the Human Body Model (HBM), Machine Model (MM), and Charged Device Model (CDM). In addition to the HBM model, the MM and CDM are test models that describe the ESD tolerance of integrated circuits operating in portable or wearable devices. Many semiconductor manufacturers consider the MM model to be obsolete. People tend to follow the HBM in terms of robustness and the resulting failure modes, although some manufacturers still use it. The CDM is another alternative model to the HBM. Instead of simulating the interaction between a person and an integrated circuit, the CDM simulates an integrated circuit sliding toward a rail or tube and then touching a grounded surface. Devices classified by the CDM are exposed to a charge at a specified voltage level and then tested for survival. If the device is still functional, it is tested again at the next voltage level until it fails. The CDM was standardized by JEDEC in JESD22-C101E.
Chips including processors, memory and ASICs are described by one or more of these three models. Semiconductor vendors use these models to ensure the robustness of circuits during manufacturing. For vendors, the current trend is to reduce voltage test levels because this saves die space and because most vendors adhere to strict internal ESD policies.
Strict ESD policies can benefit suppliers by running lower on-chip ESD protection, while circuit designers still use chips that are very sensitive to application-level ESD and never allow them to fail due to field ESD or user-induced ESD. In order to protect highly sensitive integrated circuits, designers must select protection devices that can not only prevent increased electrostatic stress, but also provide a sufficiently low clamping voltage. The following parameters should be considered when evaluating ESD protection devices:
1. Dynamic resistance: This parameter describes the diode's ability to clamp and divert ESD transients to ground. It helps determine how low the diode's resistance will be after it turns on. The lower the dynamic resistance, the better.
2. IEC 61000-4-2 rating: TVS diode suppliers determine this parameter by increasing the ESD voltage until the diode fails. The failure point describes the robustness of the diode. The higher this parameter, the better. More and more Littelfuse TVS diodes can reach 20 kV or even 30 kV contact discharge voltage, far exceeding the highest level specified in IEC 61000-4-2 (the contact discharge voltage of level 4 is 8 kV, as shown in Figure 2).
As the wearable market continues to grow and new devices are being developed, the need for circuit protection is also growing. In fact, it is more important than ever to consider ESD protection and proper circuit board layout early in the design process. Small circuit protection devices such as TVS diodes will effectively protect sensitive integrated circuits inside wearable devices and maintain the value proposition of the IoT ecosystem.
Reliable long-term tracking algorithm. The starting point of this algorithm research is that the existing tracking algorithm or detection algorithm alone cannot track the target for a long time. Kalal creatively combines the tracking algorithm and the detection algorithm to solve the problems of deformation and partial occlusion of the tracking target during the tracking process.
In this system, in order to maintain a good tracking effect, a PD controller is introduced according to the position of the ground robot in the image to keep the aircraft above the ground robot. The input of the controller is the pixel position in the center of the camera image, and the feedback value is the actual captured position of the ground robot in the image. The control block diagram is shown in Figure 7. The PD parameters are adjusted according to the experiment to keep the ground robot in the center of the image. Figure 8 shows the ground robot identified by the aircraft, and Figure 9 shows that the aircraft is tracking the ground robot.
2.2 Altitude Control Algorithm
According to the actual aircraft experiment and the description of the Wukong control system, it was tested that the throttle signal has a corresponding relationship with the actual rise and fall of the aircraft, as shown in Figure 10. The throttle PWM signal duty cycle numerator varies between 1000 and 2000. When it is between 1450 and 1550, the Wukong control system will automatically lock the current altitude of the aircraft. According to this feature, a switch controller is designed. When the altitude is lower than the given value, the duty cycle numerator is set to 1580, so that the aircraft will slowly rise. When the altitude is higher than the given value, it is set to 1430, so that the aircraft will slowly descend. And set the actual value to 5cm above or below the given value without control, that is, automatically lock the current altitude. As shown in Figure 11, when the given value is switched between 0.5m-1m-1.5m during the experiment, the aircraft can reach the given value in time. When the rudder is turned, the altitude of the aircraft will change, and the controller can also adjust to the set altitude in time. The straight line in Figure 11 represents the given altitude, and the green line represents the actual altitude of the aircraft. The altitude controller is turned on around time 10s.
3 Conclusion
Based on the 7th generation task of the International Aerial Robot Competition, this paper proposes a method for implementing airborne equipment and introduces the hardware platform and software modules of this method in detail. This method completes positioning, altitude control, obstacle avoidance, and single ground robot identification and tracking. The endurance of the aircraft is limited and there are certain requirements for the competition time, so in order to complete the pursuit goal in stage a of the competition, the upper-level strategy module needs to be further improved. In stage b of the competition, the aircraft is added to the same stage game, so more experiments are needed to increase the robustness of the system.
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