Video detection technology has been widely used in many fields such as industrial control, intelligent transportation, and equipment manufacturing. Traditional video detection often uses industrial computers as its video processor to realize its functions. This method is often unable to realize video detection in different directions at the same time due to the problem of industrial computer processing speed, and because the video detection processing process takes a lot of processing time, it is impossible to realize real-time remote control function.
Nowadays, in terms of remote control and communication, communication platforms based on DOS and Windows operating systems are widely used. However, as a single-task operating system, DOS operating system cannot meet the needs of multi-task functions and real-time processing; and as a window operating system, the stability and real-time performance of Windows operating system cannot be compared with real-time multi-task embedded operations.
This paper proposes a design method for an embedded system using DSP as the video detection processing chip and Linux as the operating system.
1 System Structure
The research and development of this system mainly includes the design of video detection card and x86 communication platform. The video detection card mainly includes three parts: analog image acquisition, conversion, and DSP video detection. Each exchange parameter detection card expands the PCI bus interface and is plugged into the PCI bus socket of the communication development platform to exchange data with the communication platform through the PCI bus. The communication platform handles the communication problems of multiple traffic parameter detection cards and transmits the video detection data transmitted by the video detection card through the PCI bus to the control center through the network in real time. The functional block diagram of the system is shown in Figure 1.
According to the system design requirements, the functions of the video detection card are mainly divided into five parts: analog image acquisition, analog image A/D conversion, data cache and DSP video detection. The video detection card process is shown in Figure 2.
This system uses PhilIPs' SAA7111A to realize analog image A/D conversion. The chip can realize multiplexing, phase locking and timing, clock generation and testing, ADC, brightness and color separation and other functions. Its output can have the following formats: YUV 4:1:1 (12bit), YUV 4:2:2 (16bit), YUV 4:2:2 (CCIR-656) (8bit), etc. Due to the different timing of the DSP processing chip and SA7111A, the CPLD can be used to control the FIFO logic to complete the data cache function.
DSP is the core of real-time signal processing. This system uses TI's DSP chip - TMS320C6211. This chip belongs to the fixed-point series of C6000, and C6211 is the most cost-effective one in this series. The C6211 processor consists of three main parts: CPU core, memory and peripherals. The integrated peripherals include EDMA controller, external memory interface (EMIF), host port (HPI), multi-channel buffer interface (McBSP), timer, interrupt selector, JTAG interface, PowerDown logic together with PLL clock generator. SDRAM is expanded through the EMIF interface, and the expansion of the PCI bus control chip is through the HPI interface.
The PCI bus interface chip PCI9050 mainly includes PCI bus signal interface and local bus signal. When designing the hardware, you only need to connect the local bus signal interface to the HPI interface of the DSP through level conversion, and expand the PCI interface to complete the hardware circuit design.
2 Embedded System Design of Communication R&D Platform
The communication R&D platform uses x86 as the core device, expands the PCI bus, and realizes the connection between x86 and the Internet through modem dial-up.
2.1 PCI bus device driver
PCI devices have three physical spaces: configuration space, memory space, and I/O space. The configuration space is a connection space with a length of 256 bytes. The definition of the space is shown in Figure 3. In the configuration space, the read-only space has the device identifier, vendor code, revision, classification code, and header type. The vendor code is used to identify the device vendor's code; the device identifier is used to identify a particular device; the revision identifies the version number of the device; the classification code is used to identify the type of device; and the header type is used to identify the header type and whether it is a multi-function device. Except for the vendor code, the values of other fields are assigned by the vendor.
The command field register is used to provide the control command word for the device response; the status field is used to record PCI bus related events.
The most important function of the base address register is to allocate the system address space of the PCI device. In the base address register, bit0 is used to identify whether it is the memory space or the I/O address space. When the base address register is mapped to the memory space, bit0 is "0", and when it is mapped to the I/O address space, bit0 is "1". Some other contents in the base address space are used to indicate the starting physical address of the PCI device address space mapped to the system space. The address space size is obtained by writing all "1" to the base address register and then reading the value of its base address.
The driving process of PCI devices mainly includes the following steps.
First, search for PCI devices. In embedded operating systems, corresponding API functions are generally provided. In Linux operating systems, the function pcibios_find_device(PCI_VENDOR_ID, PCI_DEVICE, index, & bus, & devfn) can be used to find the nth (index+1) device with the vendor code as PCI-ID and the device identifier as PCI-DEVICE, and return the bus number and function number, which are stored in bus and devfn respectively.
Step 2, PCI device configuration. Access the configuration space of the PCI device through the API functions provided by the operating system, configure the configuration of the PCI device base address register, interrupt configuration, ROM base address register configuration, etc., so that the PCI memory space and I/O address free mapping, device interrupt number, etc. can be obtained. In the Linux operating system, the API functions for accessing the PCI device configuration space are pcibios_write_config_byte, pcibios_read_config_byte, etc., which respectively complete the read and write operations of the PCI device configuration space.
Step 3. According to the configuration parameters of the PCI device, write initialization programs, interrupt service programs and programs for accessing the PCI device storage space for different devices.
2.2 Remote control and communication link establishment
The data link methods for connecting to the Internet mainly include Ethernet and serial communication. Ethernet connection is a local area network connection method, which is widely used for connecting local computers. Serial communication method through dial-up connection via modem can realize long-distance data communication. The following is a detailed introduction to the serial communication interface protocol method.
Serial communication protocols include SLIP, CSLIP and PPP communication protocols. SLIP and CSLIP provide a simple way to implement IP datagram encapsulation through serial communication, and access the Internet through the RS232 serial interface and the debugger. However, this simple connection method has many defects, such as each end cannot know the other party's IP address; there is no type field in the data frame, that is, if a serial line is used for SLIP, other protocols cannot be used at the same time; SLIP does not add a checksum to the data frame. When the message transmitted by SLIP is affected by line noise and an error occurs, it cannot be detected at the data link layer and can only be discovered through the upper layer protocol.
PPP (Point to Point Protocol) corrects the defects in the SLIP protocol. PPP contains three parts: a method for encapsulating IP datagrams on a serial link; a link control protocol (LCP) for establishing, configuring and testing data links; and a network control protocol (NCP) for different network layer protocols. PPP has many advantages over SLIP; it supports cyclic redundancy detection, supports dynamic negotiation of IP addresses between communicating parties, compresses TCP and IP messages, and supports authentication protocols (CHAP and PAP). Figure 4 shows the format of the PPP data frame.
The implementation of PPP can be completed by two background tasks. Protocol control task and write task. The protocol control task controls various PPP control protocols, including LCP, NCP, CHAP and PAP. It is used to handle connection establishment, connection mode negotiation, connection user authentication and connection termination. The write task is used to control the data transmission of the PPP device. The datagram transmission process is the process of writing data to the serial interface device through the write task. When a datagram is ready, the PPP driver activates the write task through the signal light to complete the data transmission process to the serial interface device. The PPP receiving end program is implemented by adding a "hook" program to the serial communication device driver. After the serial communication device receives 1 data, the interrupt service routine (ISR) of the BOC device calls the PPP ISR. When a correct PPP data frame is received, the PPP ISR calls the PPP input program through the scheduler, and then the PPP input program reads the entire PPP data frame from the data buffer of the serial device and processes it according to the PPP data frame rules, that is, puts it into the IP input queue or the input queue of the protocol control task respectively.
PPP is now widely accepted by various ISPs (Internet Server Providers), and the Linux operating system fully supports the PPP protocol. During the network configuration process under Linux, establish a physical connection with the ISP through a modem, and then select Netowrks Configuration in the Control Panel. Add a PPP device to the interface (InteRFace), fill in the ISP phone number, user and password, and set the local IP and remote IP to 0.0.0.0. Modify /ETC/PPP/OPTION, add DEFAULTROUE, and the ISP provides the default route. This completes the PPP data link setting process of the device, and remote control can be achieved through the Internet.
Conclusion
This design method has been successfully applied to the traffic parameter detection system of the intelligent switching system. In this system, four DSP video detection cards are used to realize traffic parameter detection in four different road areas, and Linux is used as the operating system of the communication platform; the connection with the monitoring center is established through the PPP protocol, and the monitoring center can remotely control each video detection card.
This paper proposes an embedded system for video detection and remote control; it establishes a connection with the monitoring center through the PPP protocol to achieve remote control of each video detection card by the monitoring center.
The embedded system design scheme for video detection and remote control proposed in this paper makes full use of the high-performance data processing function of DSP and the real-time and stable characteristics of the embedded system operating system, and uses the PPP protocol to establish a connection with the Internet to achieve remote control of video detection. This mode of combining DSP signal processing with embedded operating system can be widely used in video detection fields such as industrial control, product manufacturing, and intelligent transportation, and has broad application prospects.
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Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
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