Application of microprocessor dsPIC33F in microcomputer protection device

1 Introduction

As the power supply load of the power grid becomes heavier day by day, the power system has put forward higher requirements for microcomputer protection devices. It is difficult for general low-end single-chip microcomputers to meet the design requirements. In recent years, the performance of various integrated single-chip DSPs has been greatly improved, and there are more and more software and development tools, making DSP devices and technologies easier to use and the price acceptable to the majority of users. The digital signal processor dsPIC33F launched by Microchip integrates A/D conversion, communication, watchdog, protection and data storage, and also supports SPI mode and I2C mode data transmission, which is convenient for capacity expansion. Therefore, the development of microcomputer protection devices based on dsPIC33F not only improves the overall performance of the protection system and the versatility of the hardware platform, but also shortens the development time and reduces the development and hardware costs, which is of certain significance to improving the stable operation level of the power system.

2 Introduction to the dsPIC33F Digital Signal Controller Series

The dsPIC33F series is a high-performance 16-bit digital signal controller with extended digital signal processor (DSP) functions and high-performance 16-bit microcontroller (MCU) architecture. It is a 16-bit improved Harvard structure RISC device that combines the control advantages of a high-performance 16-bit microcontroller and the high-speed computing power of a digital signal processor. It is a high-performance digital signal controller (DSC). The dsPIC33F series devices have the following performance characteristics:

(1) DSP core and instruction system The DSP engine of dsPIC33F has a high-speed 17-bit × 17-bit multiplier, a 40-bit ALU, two 40-bit saturated accumulators and a 40-bit bidirectional shifter. Its operation speed can reach 40 MI/s, the instruction word is 24 bits, and the instruction system includes the MCU instruction set and the DSP instruction set. In addition, these instructions have been specially optimized for the C language compiler, and the program code written in C language is very efficient. dsPIC33F allows a deviation of ±10% in the operating voltage, that is, the operating voltage is 3.0~3.6 V.

(2) Direct Memory Access (DMA) and Interrupt Capability The dsPIC33F has an 8-channel direct memory access module integrated inside, allowing data to be transferred between RAM and peripherals during CPU code execution without occupying additional cycles. The 2 KB dual-port DMA buffer (DMA RAM) is used to store data transferred via DMA. The DMA interrupt source can be set by software to meet design requirements. The dsPIC33F contains an exception handling structure consisting of up to 118 prioritized interrupt vectors, with interrupt priority levels of 7. Up to 67 interrupt sources, 5 external interrupts and 5 processor exceptions.

(3) Storage Space and Peripheral Devices The program counter is 23 bits wide and can address 4 Mx24 bits of program storage space. For DSP instructions, two data areas are addressed separately; for MCU instructions, the data space can be addressed as a whole as 64Kx8 bits. The dsPIC33F integrates necessary storage devices such as SRAM and Flash, provides 10-bit and 12-bit A/D conversion modules (optional), 8-bit watchdog, and communication modules such as UART, SPI, I2C, and CAN.

(4) Development Tools Microchip's high-performance development system supports the dsPIC33F series controllers. The development system includes the MPLAB integrated development environment (IDE), MPLAB C30 C compiler, MPIAB SIM 30 software simulator, MPIABICD 2 online debugger, and MPLAB ICE 4000 online simulator. The dsPIC33F series digital signal controllers are also equipped with a series of application libraries.

3 Application of dsPIC33F in Microcomputer Protection Hardware System

The device is divided into CPU module, AC plug-in, digital I/O microcomputer protection, communication, human-machine interface unit and power supply unit according to function. The communication interface is directly connected to the host computer or communication management machine. The human-machine interface adopts 128x64 dot matrix LCD and special keyboard, which has large display information and convenient operation. The hardware design block diagram is shown in Figure 1. The microcomputer protection device has 16 inputs, 16 outputs, and 15 analog quantities. The CPU module principle block diagram is shown in Figure 2. Because dsPIC33F has powerful computing power and perfect control functions, it can complete the functions of calculation, control, communication, human-machine interface, etc. independently, reducing the number of devices and simplifying the hardware structure. Because dsPIC33F integrates RAM, Flash, A/D converter, etc., there are few external expansion circuits, which further simplifies the hardware structure and basically realizes the bus no chip no design, which greatly improves the anti-interference and reliability of the protection device.

3.1 Memory expansion and real-time clock interface

The dsPIC33Fj256GP710 has an internal integrated 30 KB SRAM as data storage space, and a 256 KB enhanced Flash as a program or data storage area. Due to the microcomputer protection, the storage of protection settings, event records and fault recording data all require a large storage space, so the device expands 1 MB of external storage space and connects the serial flash memory AT45DB081 to the dsPIC33FJ256GP71O through the SPI bus. The operating voltage of AT45DB081 is 2.7~3.6 V, and the system is repeatedly erased and compatible with the SPI Flash memory. There are 4 096 pages, 264 bytes per page, a total of 8MB of main memory capacity and two 264-byte SRAM data buffers. The interface design circuit of AT45DB081 and dsPIC33FJ256GP710 is shown in Figure 3. In Figure 3, SDO1, SOI1, SCK1 of dsPIC33Fj256GP710 are connected to the serial input (SI), serial output (SO) and clock (SCK) pins of AT45DB081 respectively, and RE4, RE2, RE5, RE6 are connected to the chip select (CS), reset (RESET), busy status (RDY/BUSY) and write protection (WP) pins of AT45DB081 respectively. dsPIC33F reads the busy status pin of AT45DB081 through RE5 to determine whether the memory is idle. If RE5 is "1", it means the memory is idle, otherwise it means the memory is busy. When the memory is idle, "0" is output through RE4 pin as the chip select signal of the memory. After the memory is selected, the command word is sent through SPI to complete the corresponding read and write operations of AT45DB081. Microcomputer protection needs to configure 3 fixed values, which are stored in 3 different intervals. Whether the fixed values ​​are correct during operation is verified. To this end, the space allocation of AT45DB081 is as follows: the fixed value, control word, factory setting and adjustment coefficient are divided into 4 areas, which are stored in pages 0 to 9 of AT45DB081, that is, the first area is pages 0, 1, and 2 of AT45DB081, which store the 1st, 2nd, and 3rd fixed values ​​of the protection device respectively; the second area is pages 3, 4, and 5 of AT45DB081, which store the 1st, 2nd, and 3rd fixed values ​​of the protection device respectively; the third area is pages 6, 7, and 8 of AT45DB081, which store the 1st, 2nd, and 3rd fixed values ​​of the protection device respectively; the fourth area is page 9 of AT45DB081, which stores the adjustment coefficient. Event records are stored in pages 10 to 1 000 of AT45DB081. Fault recording data is stored in pages 1 001 to 4 000 of AT45DB081.

PCF8583 is a serial bus expansion method. The I2C clock line SCL and data line SDA of DSP are used to complete the parameter setting, date and time reading and other operations of PCF8583. At the same time, PCF8583 has the advantages of simple interface, less DSP resource occupation and high reliability, and can still count time when power is off. The extended clock device is used to record the working time of the system. In addition, in order to avoid the device frequently reading and writing EEPROM, the signals that the protection device frequently reads and writes, such as accidents, warnings, pulse quantity, restart times, device fault signals and exit signs, are stored in RAM registers. The clock device calls these contents while reading the current time, and can obtain this information when the device is powered off and powered on again.

3.2 A/D conversion based on DMA

DSPIC33FJ256GP710 integrates 32 channels of 12-bit high-precision A/D conversion modules, with a conversion speed of up to 1 Ms/s, and can flexibly set the sampling channel. The sampling mode can be selected from manual and automatic. There are also many ways to stop sampling and start conversion, such as manually clearing SAMP to start sampling, internal counter counting trigger sampling, timer Timer3 overflow trigger sampling, interrupt pin INTO trigger, etc. Among them, timer Timer3 overflow trigger sampling is suitable for fixed-point sampling of protection devices. A/D conversion adopts direct memory access (DMA) mode. After sampling, the data is directly stored in DMA RAM (with 2 KB space), which does not occupy CPU cycles. After the A/D conversion is completed and the data has been stored in DMA RAM, a DMA interrupt will be generated. Register AD1CON2 can be used to select the interrupt that will be generated after the multi-channel sampling is completed. This device collects a total of 15 analog quantities, using the automatic sampling and Timer3 trigger conversion mode. The conversion is triggered once in each sampling cycle. After all 15 samplings are completed, an interrupt is generated and all 15 data are read from the DMA RAM area at once. In this working mode, the CPU only needs to start A/D conversion once, and transfer the sampled data from the peripheral to the RAM through DMA without occupying the CPU instruction cycle, which greatly improves the sampling processing efficiency and leaves enough time for the CPU to calculate and judge the fault.

3.3 Ethernet interface expansion

The Ethernet interface expansion circuit is shown in Figure 4. This device uses I/O port to simulate SPI to realize the connection between the main controller and ENC28J60. After ENC28J60 receives a full frame, it sends an interrupt signal to notify dsPIC33F through the INT pin. SO is the host read command pin, and SI is the host write command pin. Microchip provides a set of embedded TCP/IP protocol stacks CMX-MicroNet specifically for dsPIC33F series digital signal controllers. This protocol stack is optimized for the Flash and RAM resources of dsPIC33F series devices and provides software support for the implementation of Ethernet functions. This protocol stack can be run alone or embedded in a real-time operating system (RTOS). The Microchip CMX-MicroNet protocol stack adopts a layered structure, and users can implement network applications without being very familiar with TCP/IP.

In the main program, the watchdog time of dsPIC33F is initialized, that is, two 8-bit counters WDT Prescaler A and WDT Prescaler B need to be set, and the overflow time can be adjusted between 2 ms and 16 s. In the timer initialization of dsPIC33F, it is necessary to consider that dsPIC33FJ256GP710 has 9 16-bit timers. The software of this device uses 3 timers: T1, T3 and T5. Among them, the interrupt time of timer T1 is 1 ms, which completes the functions of clock reading and writing, binary input quantity acquisition, binary output quantity output, switch position change event recording, etc.

Timer T3 interrupt completes the start of A/D conversion. Without occupying CPU cycles, the sampled data is stored in DMA RAM through DMA mode, avoiding data exchange between CPU and peripherals and occupying precious CPU time, which increases the running speed of the program. The reading of sampled data is carried out in DMAO interrupt. T5 interrupt completes the calculation and judgment of protection.

In the two communication interruption functions of sending and receiving, the microcomputer protection device mainly uploads switch quantity, protection setting value, event record and telemetry (current, voltage, active power, reactive power and power factor, etc.), and transmits and modifies protection setting value, time information and remote control operation, etc. The communication of this device adopts IEC60870-5-103 transmission protocol and Mdbus protocol (optional) to meet the requirements of standardized communication interface.

5 Anti-interference design of protection device based on dsPIC33F

In the working environment of the microcomputer protection device, electromagnetic interference (such as lightning strikes) is quite serious. System failures, system equipment misoperation, control, overcurrent and surge interference may invade the protection device. Inside the microcomputer protection device, interference will also be generated due to the action of the auxiliary relay or the high-frequency signal in the DC converter conversion process. These interferences are characterized by high frequency, large amplitude, and short duration. They can invade the electronic circuits in the microcomputer protection device through various channels and interfere with the normal operation of the microcomputer protection. The WDT module integrated in the dsPIC33F provides a special clock signal from the internal oscillation circuit. If the pulse is not cleared, it will generate an output pulse with a fixed frequency to reset and restart the entire CPU system. To start the watchdog, just set the watchdog Timer to enable in the MPLAB ICD 2 integrated development environment. In order to enhance the anti-interference performance, the software also adds 4 non-maskable interrupt error handling functions to handle crystal oscillator, address, stack and arithmetic errors. Grounding, isolation, shielding and other measures are taken in the hardware anti-interference measures to effectively ensure the electromagnetic compatibility performance of the device.

6 Conclusion

A new type of microcomputer relay protection hardware platform based on dsPIC33F microprocessor is studied, and a detailed system hardware design scheme and software flow are given. The scheme has a simple structure, high cost performance, high reliability and short development cycle. The complete set of microcomputer protection devices for power plants and substations developed on this hardware and software platform has passed the type test of the National Relay Testing Center and has been put into field operation. All technical indicators meet the relevant industry standards and field requirements.