Research on a New Single-Phase PWM Algorithm Based on DSP

Pulse-Width Modulation (PWM) technology is widely used in the field of power electronics. The PWM mode is the basis for determining the output voltage characteristics of the inverter. A PWM mode with superior performance can make the inverter have good output characteristics. From Fourier analysis, it can be seen that an asymmetric waveform will bring a large number of low-order harmonics, even-order harmonics and cosine terms. Therefore, the symmetry of the PWM pulse waveform has a great influence on the output characteristics.

There are generally two methods for implementing PWM: comparison method and calculation method. With the rapid development of digital technology and the improvement of computer functions, the calculation method has become the mainstream of PWM implementation methods due to its convenience and flexibility. When using the calculation method to implement PWM, it can be divided into regular sampling PWM and natural sampling PWM according to the method of taking the modulation wave in each carrier cycle. Among them, the regular sampling method is simple to calculate and occupies less system software resources, so it is widely used; however, the PWM waveform calculated by the regular sampling method has poor output accuracy when the system carrier frequency is low, and the calculation result needs to be determined by table lookup during calculation, so the symmetry of the waveform cannot be guaranteed, and the harmonic content will also increase due to the asymmetry of the waveform.

There are three types of modulation PWM: synchronous modulation, asynchronous modulation, and segmented synchronous modulation. Although synchronous modulation can keep the phase of the carrier wave and the modulation wave the same in all ranges of the modulation wave frequency change, the PWM waveform always remains symmetrical, and the low-order harmonics of the output harmonics can be eliminated. However, when the carrier frequency changes in a large range, the switching frequency of the power electronic device changes in a large range. At low frequencies, a large number of low-frequency harmonics will be introduced into the system. The advantage of asynchronous modulation is that the carrier frequency does not change during the speed regulation process, and the impact of high-order harmonics on the system is basically fixed, which can make up for the shortcomings of synchronous modulation. However, asynchronous modulation cannot ensure that the phase of the modulation wave and the carrier wave is relatively fixed at most frequency points, and an asymmetric waveform will appear, which will introduce a large number of low-order harmonics, even harmonics and cosine terms into the system. Segmented synchronous modulation can combine the advantages of the above two methods, but voltage mutations or even oscillations may occur when the wave ratio is switched. Based on the above theory, this paper proposes a new PWM algorithm that can keep the PWM waveform completely symmetrical about the T/4 period within the T/2 period under asynchronous modulation.

1 PWM Algorithm Principle

When using digital control technology to generate PWM pulses, the triangular carrier wave actually does not exist and is completely replaced by software and hardware timers. Figure 1 shows the principle of triangular carrier wave generation (Ttimer is the value of the timer). The generation mechanism of PWM pulses is as follows: the timer repeatedly counts according to the PWM cycle. The comparison register is used to maintain the modulation value. The value in the comparison register is compared with the value of the timer counter. When the two values ​​match, the PWM output will jump; when the two values ​​match twice or a timer cycle ends, the second output jump will occur. In this way, a pulse signal with a period proportional to the comparison register value will be generated. The process of counting and matching output is repeated in the comparison unit to generate a PWM signal, as shown in Figure 2.

Based on the characteristics of PWM pulses generated by digital control technology, the algorithm proposed in this paper can achieve the generation of completely symmetrical PWM waveforms at any frequency. The principle is: determine the timer period according to the triangular carrier frequency and the DSP system clock frequency, and use mathematical calculation methods to divide the timer period that forms the carrier into equal parts. The number obtained after equal division is used as the pulse width increment unit, which increases over time. The pulse width increases or decreases proportionally with the pulse width increment unit.

The triangular carrier is formed by software and hardware timers, and the frequency of the triangular carrier is determined by the clock frequency and the period value of the timer. A timer period T1 can be selected as needed to determine the fixed carrier frequency in the frequency modulation process. Since the carrier frequency does not change, the carrier ratio of the entire frequency modulation process is variable. The carrier ratio under a fixed output wave frequency f1 can be set to n1 first, and the required output frequency f (corresponding to the period T) is processed, as shown in formula (1), where x is the value of f after processing. Figure 3 shows the principle diagram of the equal-divided carrier. The period of the timer is divided into n1/(4x) parts, and the width of each part is determined by formula (2):

f1/1=fx (1)

ω=4T1x/n1 (2)

Where: ω is the minimum unit of pulse width increment. After determining the minimum unit value of pulse width increment, take ω as the increment unit, and increase or decrease the duty cycle value in sequence with time. The duty cycle increase process is: the first load duty cycle is ω, the second load duty cycle is 2ω, the third load duty cycle is 3ω, the yth load duty cycle value is yω, and the duty cycle value increases in this order. Formula (3) is the mathematical expression of the DC update law of the duty cycle value when the pulse width increases. The value of K in the formula is the coefficient required to satisfy the impulse theorem, which will be calculated and discussed in detail later.

When the output pulse reaches the maximum width MAX(DC), the count value of a also reaches the maximum value MAX(a), and the pulse output of the T/4 cycle has been completed. At this time, the duty cycle decreases from the maximum width in sequence, and the decreasing rule is yω, (y-1)ω, until ω0. Formula (4) is the mathematical expression of the duty cycle value DC' update rule when the pulse width decreases. Among them, the initial value of DC' is MAX(DC), and the initial value of a' is MAX (a).

From the above principle, it can be seen that the PWM waveform is completely symmetrical about T/4 within T/2. Figure 4 shows the principle diagram of duty cycle update.

From the above analysis, the carrier frequency is a fixed value in the whole process, so it has the advantages of asynchronous modulation. At the same time, the pulse width is completely determined by the number of clocks forming the carrier and the frequency factor of the expected output wave, rather than by looking up the table, which can overcome the disadvantage that the carrier and the modulation wave are not synchronized in most cases during asynchronous modulation. This algorithm combines the advantages of synchronous and asynchronous modulation and avoids the problem of frequency modulation when using segmented synchronous modulation. The basic basis of PWM is the principle of equal area, that is, when narrow pulses of different shapes with equal impulses (areas) are added to the inertia link, their effects are basically the same. On the basis of ensuring the symmetry of the waveform, the implementation of the principle of equal impulses in this algorithm is discussed. Taking sinusoidal modulation as an example, when the modulating wave is a sine wave, according to the principle of equal area, the area of ​​its sinusoidal half-wave integral is equal to the sum of the pulses added, as shown in formula (5).

The impulse area can be determined according to the duty cycle update principle, as shown in equation (6).

When the modulation depth M=1, the value of the coefficient K can be obtained as shown in formula (7):

According to the above formula, the output waveform area can be accurately calculated, and the selection of K value can determine the amplitude of the output voltage.

2 Experimental Results

In order to verify the correctness and feasibility of the proposed PWM algorithm, the experiment was conducted using TI's TMS320F2812. The system uses a 30 MHz external crystal oscillator, and the frequency of the general timer clock is obtained by multiplying the system by 5 and then dividing it by 6, which is 25 MHz. The carrier frequency used in this experiment is fz=1 kHz, and the timer period value T1=12 500. When the output frequency f1=50 Hz, the carrier ratio n1=20. The choice of loading and updating the duty cycle value when the timer reaches the period value is equivalent to loading at the peak of the triangular carrier.

The experimental results are shown in Figure 5 (UPWM is the PWM pulse amplitude): Figure 5(a) is the output waveform obtained by using the algorithm for unipolar modulation, which is the output waveform of the positive half cycle for 50 Hz sinusoidal modulation; Figure 5(b) is the output waveform of the positive half cycle for 43 Hz sinusoidal modulation; Figure 5(c) is the energy spectrum analysis diagram of the sinusoidal PWM pulse waveform for 50 Hz unipolar modulation; Figure 5(d) is the energy spectrum analysis diagram of the sinusoidal PWM pulse waveform for 43 Hz unipolar modulation.

3 Conclusion

This algorithm is an algorithm based on asynchronous modulation to optimize the PWM pulse waveform, which is of great significance to improving the system output quality. The algorithm has been successfully applied to achieve frequency modulation within 1 ~ 400 Hz, output waveforms that are completely symmetrical to the T/4 cycle, effectively reducing harmonics, and operating results are good.