SiP is ushering in the industry's hot spot, and all major giants are "waiting for the rabbit"

SiP system-level packaging technology is an important means of miniaturizing electronic systems and is becoming a hot spot in the current development of electronic technology. Compared with SoC, SiP technology also has the advantages of short cycle and low cost.

As emerging fields such as 5G, IoT, AI, and wearable devices accelerate, SiP packaging will usher in the next outlet. To meet the relevant trends, ASE, TSMC, and Intel are all ready, successfully taking the lead and waiting for the huge business opportunities to come.

SiP (System in Package) is to integrate multiple functional chips, including processors, memory and other multifunctional chips, side by side or stacked in one package to achieve a basically complete function. As Moore's Law gradually reaches its limit, the integration advantages of SiP packaging begin to emerge.

At present, ASE's SiP technology includes 2.5D FOCoS, 2.5D SiP, and 3D SiP, focusing on mid-stage wafer-level packaging or back-end module packaging and testing. Its customer base targets design companies such as MediaTek and Qualcomm, or IDM customers.

TSMC's heterogeneous integrated packaging and testing is based on front-end wafer foundry and mid-end wafer packaging. Its technologies include 2.5D stacked CoWoS (chip on wafer on substrate packaging) and InFO (integrated fan-out packaging), 3D TSMC-SoIC (chip stacked wafer), and WoW technologies. Its potential and existing customer base includes Apple, Xilinx, Broadcom, AMD, etc.

Intel, which has always been at the forefront of advanced process technology, mainly uses embedded multi-chip interconnect bridge (EMIB) technology, including 2.5D EMIB and 3D EMIB, in heterogeneous integrated SiP, covering mid- and back-end packaging and testing of CPUs and other chips. Intel's first SiP packaging product using this type of Foveros technology, integrating 10nm HPC processors, 22nm I/O chips, memory, etc., is expected to be mass-produced by the end of this year.

ASE mentioned that under the trend of 5G, AI, HPC, and IoT, due to the differences in chip design among various companies, coupled with the need to achieve high-frequency and high-speed characteristics, as well as to maximize chip performance and minimize the size after packaging, the demand for customized SiP packaging has risen rapidly. SiP integration technology has become the most important discipline in the semiconductor industry.