Design of image capture card based on TMS320F206DSP

    Abstract: An interface design scheme is proposed that uses the video A/D chip TLC5510 and the low-end DSP chip TMS320F206 to achieve image acquisition. At the same time, the interface program is given, which provides a new application path for the low-end DSP chip.

    Keywords: ADC DSP interface design video

Digital signal processor (DSP) is the crystallization of the fusion of digital signal processing theory and very large scale integrated circuit (VLSI) technology. At present, DSP technology is being widely used in communications, voice, imaging, aerospace, instrumentation and other fields, and is playing an increasing role in promoting the digitalization of contemporary information processing.

In the field of low-bit-rate multimedia communication that uses telephone lines to transmit video images, if you choose a dedicated chip for image processing, such as SAA7110, 8×8 3104VCP and LSI's dedicated chip, or you can choose a high-end DSP with high-speed computing performance. Image processing will significantly increase the price. The image capture card introduced in this article using TI's low-end DSP chip TMS320F206 and video A/D chip TLC5510 provides a cheap solution for low-bit-rate multimedia communications.

1 Introduction to TLC5510 chip and TMS320F206 chip

1.1 Introduction to TLC5510

The TLC5510 is a CMOS, 8-bit, 20MSPS analog/digital converter (ADC) that utilizes a semi-flash architecture. The TLC5510 operates from a single 5V power supply and consumes only 100mW of power. It also has an internal sample and hold circuit, a high-impedance parallel output, and an internal reference resistor.

Compared with flash converters, the semi-flash structure reduces power loss and chip size. By implementing the conversion in a 2-step-process, the number of comparators can be greatly reduced. The waiting time for converting data is 2.5 clock cycles.

A full-scale conversion range of 2V is achieved using only the internal reference resistor and VDDA, eliminating the need for an external reference voltage source and precision resistors. The linearity error at 25℃ is ±0.75LSB, and the maximum linearity error over the entire temperature range is ±1LSB. The differential linearity error at 25°C is ±0.5LSB, and the maximum differential linearity error over the entire temperature range is ±0.75LSB.

1.2 Introduction to TMS320F206

TMS320F206 is a DSP chip launched by TI. It is a high-speed fixed-point digital processing chip based on TMS320C5x. It has the characteristics of improved Harvard structure (parallel separated program and data bus), high-performance CPU and efficient instruction set. Its main features are as follows:

The CPU has a 32-bit CALU, a 32-bit accumulator, a 16×16-bit parallel multiplier, three shift registers, and eight 16-bit auxiliary registers.

The memory has 224K words of addressable storage space, 544 words of on-chip DRAM, 4K words of on-chip SRA or 32K bytes of flash memory.

Instruction speeds are 50ns, 35ns and 25ns single instruction cycle.

The peripheral circuits include software programmable timers, software programmable wait state generators, on-chip phase-locked loop clock generators, and synchronous and asynchronous serial ports.

2 Hardware interface circuit design

2.1 TLC5510 front-end circuit design

The TLC5510 front-end circuit is shown in Figure 1.

In the circuit, the analog power supply VDDA and the digital power supply VDDD are independent of each other. Between VDDA and digital ground AGND and between VDDD and analog ground DGND, 4.7 μF capacitors, 0.1 μF capacitors and ferrite magnetic rings are used to decouple and eliminate the ripple of the power supply. AGND is separated from DGND to avoid digital signals bringing noise to analog signals. The amplified video signal is directly added to pin 19 of TLC5510. The clock signal of TLC5510 is provided by the clock signal output pin CLKOUT1 of TMS320F206.

2.2 TLC5510 and TMS320F206 interface circuit design

The interface circuit diagram between TLC5510 and TMS320F206 is shown in Figure 2.

The TLC5510 digital ground is connected to the TMS320F206 ground. Because there is a digital output buffer inside the TLC5510, the pins [D1: D8] of TLC5510 are directly connected to the pins [D0: D7] of TMS320F206. The CLKOUTI pin of TMS320F206 provides the clock signal to TLC5510 through a small resistor. TMS320F206 pins A11 and IS are logic controlled. When A11 is logic high and IS is logic low, TMS320F206 can read sampling data from TLC5510.

2.3 TMS320F206 communicates with computer serial port

The image data stored in TMS320F206 is sent to the computer at a rate of 9600 b/s through the serial port. The computer stores the data in the buffer area, and then displays it on the monitor through the pixel and image conversion program.

3 Interface programming

3.1 Initialization of program constants

(1) Suppose the starting address of the sampling data storage area is 0900h

(2) Assume the number of samples is 1000h

(3) Set the A/D address to 0800h

3.2 Procedure steps

(1) Initialize TMS320F206

(2) Load the appropriate ARn

(3) Strobe TLC5510

(4) Read the A/D conversion value

(5) Initialize UART

(6) Transfer data to UART

(7) End of program

3.3 Specific procedures

.title "TLC5510 Interface"

.copy "init.h"

.copy "vector.h"

.text

ADC_Addr .set 0800h; Set the address of TLC5510

Mem_pointer .set 0900h; Set the starting address of the sampling data storage area

Count .set 1000h; Set the number of samples

start: lar ar2,#ADC_Addr

lar ar3,#Mem_pointer

lar ar4,#Count

* Start A/D conversion

ldp #6h; Set the page pointer to point at 50h×6=0300h

splk #Count,0h; put the number of samples into 0300h

lar ar4,#0300h; Make AR4 point to 0300h

mar *,ar4; set AR4 as the current register

rpt *, ar3; after setting the RPTC register, set AR3 as the current register

in *+,ADC_Addr,ar4; read and store A/D conversion results

*Transmit data to computer via UART

* Initial UART port

clrc CNF; map B0 block to data space

ldp #0h; Set the leaf pointer to point at 0h

setc INTM; disable all interrupts

splk #0fffh,ifr; clear interrupt

splk #0000h,60h

out 60h,wsgr; set zero wait

splk #0c180h,61h; Reset the UART port

out 61h,aspcr; allow I/O interrupts

splk #0e180h,61h

out 61h,aspcr; open I/O interface

splk #4fffh,62h

out 62h,iosr; disable automatic baud rate

splk #00082h,63h

out 63h,brd; set the baud rate to 9600

splk #20h,imr; allow UART interrupt

lar ar3,#0900h; restore AR3

lar ar4,#(Count-1) ；Restore AR4

mar *,ar3; Set AR3 as the current register

clrc intm; turn on interrupt

uart1: setc xf; set xf to 1 and start transferring numbers

mar *,ar3; set AR3 as the current register

out *+,adtr; after transmitting the data, add 1 to AR3

wait: clrc xf; close xf, stop transmitting data

mar *,ar2; set AR3 as the current register

in *,0fff6h; read and write the status of the IOSR register

bit *,4; Check whether bit 12 is 0

bcnd cont,tc; if 0, wait until bit 12 of IOSR is 1

b wait

skip: splk #0020h,ifr; clear interrupt

clrcintm

mar *,ar4 ;The number of transmissions is reduced by 1

banz uart1,ar3; if the transmission is not completed, jump to UART1 and transmit the next number.

ret ;return

inpt 1:ret

inpt23:ret

timer:ret

uart:ret

codtx:ret

codrx:ret

.end

We have designed the interface between TLC5510 and TMS320F206 for use in remote multimedia low-bitrate communication monitoring systems in coal mines, and have made initial progress. This application can provide an idea for TMS320F206 to be used in image processing, thus opening up new areas for low-bitrate multimedia communications. A cheap way.