Design of an intelligent controller for low voltage circuit breaker based on DSP and CPLD

The development of smart grids has put forward higher requirements for the intelligence of low-voltage electrical appliances. At present, the intelligent stability of small circuit breakers, which are widely used in China, is not enough. The signal acquisition circuit, action execution and intelligent release are all installed in the body. The electromagnetic interference and high temperature generated by the strong electric field in the switch reduce the reliability of the circuit breaker. The intelligent controller introduced in this article is separated from the circuit breaker body and can be connected to multiple circuit breakers to realize the monitoring of multiple circuit breakers.

1 Overall structure of the controller

The core of the group intelligent controller uses DSP  chip, supplemented by CPLD  EPM3128 chip to realize the timing logic of keyboard and LCD, reduce the volume problem caused by the expansion chip, and the peripheral circuit mainly includes signal conditioning circuit and trip control circuit, etc. In order to adapt to the wireless communication of smart grid, GPRS module is added to the intelligent controller, so that the circuit breaker can be better integrated into the smart grid.

2 Controller Hardware Design

The voltage, current and other signals of multiple circuit breakers collected are sent to the DSP processor after conditioning by the signal conditioning circuit. After signal conversion, calculation and judgment, the circuit breaker is tripped through the tripping circuit when there is a fault. The overall structure of the system is shown in Figure 1.

2.1 Signal conditioning circuit module design

The main functions of the signal conditioning module are: first, low-pass filtering to filter out high-frequency noise; second, signal amplification. Due to the large detection current range, in order to adapt to the larger dynamic range, improve the A/D sampling resolution, and make the converted digital signal reflect the size of the analog signal as accurately as possible, two amplification links are designed. One has a larger amplification factor to amplify the signal when the current is small; the other has a smaller amplification factor to amplify the signal when the current is large. Because the signal input range of the A/D converter is limited, in order to prevent the generation of excessively high input voltage when the current signal is large, which may damage the detection circuit and the A/D converter, a level limiting protection circuit is designed.

Figure 2 shows the filtering, shifting, amplifying and limiting circuits for each phase of large current signals. Since the input voltage range of the A/D converter is 0 to 3 V, and the input signal is an alternating sine wave with a DC offset level of 0 V, a level shift circuit is designed to raise the current signal. The low-pass filter and signal amplification are composed of two stages of operational amplifiers.

2.2 Tripping circuit module design

The tripping circuit is divided into digital tripping and analog tripping. The digital tripping circuit is relatively simple. The DSP outputs the tripping signal through the I/O port, and drives the flux coil through the optocoupler isolation amplification. The analog tripping circuit is implemented by a comparator level detection circuit. Two comparators are used for each phase current. When the microprocessor does not send a tripping signal and the amplitude of the current signal is within the reference voltage range, the comparator outputs a high level in parallel, otherwise it is a low level. The low-level signal passes through the pulse width detection circuit for anti-interference processing. If the low pulse maintains a certain width, the monostable trigger is triggered, and a pulse of a certain width is output through the drive circuit to open the flux converter, thereby disconnecting the circuit breaker. The analog tripping circuit is shown in Figure 3.

In practical applications, due to the presence of interference, some unnecessary narrow pulses will appear in the output of the comparator level detection circuit. Therefore, a pulse width detection circuit is designed to filter out the interference spikes that cause false triggering of the tripping action. During the design, when the input pulse width is greater than 1ms, a 32.9ms tripping signal is output; when it is less than 1ms, no tripping signal is output.

In practical applications, the short-circuit current at the initial stage of power-on only works within 100 ms. After that, the DSP starts to operate normally after initialization. The analog tripping circuit judges the extremely large short-circuit current. The current setting values ​​are different in the two different situations. Therefore, a switchable reference voltage, namely the MCR disconnection and connection circuit, is designed. At the initial stage of power-on, the voltage across C408 is low, and the comparator outputs a high level, so that T401 is saturated and turned on. Therefore, the reference voltage is reduced, that is, the analog tripping action value is low. When a short-circuit fault occurs, the MCR tripping is realized. After the power-on is stable, the voltage across C408 increases, and the comparator outputs a low level, so that T401 is cut off. At this time, the reference voltage is high. When an extremely large short-circuit current occurs, the analog tripping is realized. The MCR tripping circuit is shown in Figure 4.

2.3 GPRS communication module and DSP hardware interface design

The GPRS communication module uses the MC55GPRS module of SIEMENS. The software schematic diagram is shown in Figure 5. The DSP chip F2812 is extended with a B chip with dual asynchronous serial port (UART) through the external bus interface XINTF, and connected to the MC55 GPRS module. The DSP chip mainly implements the protocols required by the entire system, the collection of monitoring data, and the analysis of the commands of the central master station; the GPRS module completes the wireless communication function.

3 Controller Software Design

The system software mainly completes functions such as signal sampling, tripping algorithm, communication processing and key display. The software design of the controller uses a mixed programming method of assembly language and C language to optimize the program structure to ensure real-time performance. The program has the characteristics of modularization and subroutine, and anti-interference processing is added to the program design. The main program flow chart is shown in Figure 6.

4 Conclusion

This paper describes in detail the design process of each component of the intelligent controller system and gives a specific circuit diagram. The software and hardware system tests show that the intelligent controller can well complete the signal acquisition, wireless communication and line on/off control functions. In subsequent research, the embedded real-time multi-task operating system μC/OS-Ⅱ can be used as the system software platform to realize the transplantation of μC/OS-Ⅱ on F2812.