Realization of analog signal waveform based on FPGA

Publisher:leader4Latest update time:2012-08-27 Source: 21ic Reading articles on mobile phones Scan QR code
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1 Introduction

Waveform generators have been widely used in various fields such as communication, control, and measurement. Waveforms such as sawtooth waves, sine waves, and square waves are often used in circuit design and debugging. With the rapid development of electronic technology, digitalization is gradually becoming the development trend of the electronics industry. Companies are expanding their products in the direction of digitalization, integration, and miniaturization. As we all know, digital electronic products have irreplaceable advantages, such as small size, high degree of integration, and strong anti-interference ability. However, digital circuits can only process pulse waveforms well, that is, they can only process square waves formed by 1 and 0 very well. They cannot process continuous and gradual signals well, which is exactly the advantage of analog circuits. This paper combines digital circuits with analog circuits, that is, FPGA is used to generate the control signals of various analog waveforms required, and then the gradual signals are processed by analog circuits, so that various clear waveforms can be obtained.

2 Oscilloscope Display Principle

First, the display principle of the oscilloscope is briefly explained in order to better understand the working process of the hardware circuit. During the entire display period, the oscilloscope needs to be in the "XY" position, that is, the waveform of the oscilloscope is the superposition and synthesis of the input signals of the X-axis and the Y-axis. It can be seen that, in general, the variable input on the x-axis is the signal frequency, and the variable input on the y-axis is the signal amplitude. Therefore, when a signal frequency value of 5KHz is input on the x-axis and a DC voltage amplitude of 0V is input on the y-axis, a bright spot will be displayed at the position of (5KHz, 0V) on the oscilloscope; similarly, if a DC voltage amplitude of 5V is input on the y-axis and a signal frequency value of 0Hz is input on the x-axis, a bright spot will also be displayed at the position of (0Hz, 5V) on the oscilloscope; and if the inputs on the x-axis and the y-axis are 5KHz and 5V respectively, the bright spot will appear at (5KHz, 5V) on the oscilloscope. In this way, if the two coordinate axes are assigned values ​​continuously through the program, a clear and continuous signal waveform can be displayed on the oscilloscope.

3 Hardware Design

This article mainly introduces the simulation waveform design of step wave and sawtooth wave in common signals in detail. Their simulation circuits are simple to implement and the actual output waveform is clear. The hardware circuit in the scheme is mainly composed of DSP, FPGA and peripheral chips. DSP is used to control the output position and amplitude of the analog waveform; the peripheral chip is used to generate the analog waveform, such as using two DAC0832 to generate two voltage signals, one for controlling the height of the sawtooth wave and the other for controlling the height of the step wave. The FPGA performs the logic programming of various control signals required.

Here, the FPGA uses ALTERA's 10K10 series of programmable logic devices. ALTERA's FLEX 10K series devices are the industry's first embedded programmable logic devices. They are flexible logic element array architectures that use a general gate sea architecture to implement general logic functions, and also use dedicated silicon chips to implement large-scale dedicated functions. Compared with standard gate arrays, since embedded functions are implemented on silicon chips, the required silicon chip area is smaller and the system speed is higher. The FLEX 10K series not only provides high density, high speed and system integration functions, but also contains multiple 32-bit buses and *4-bit RAM space inside a single device. It also supports serial and parallel configurations and online simulation of JTAG mode. These features make the FLEX IOK series devices one of the most widely used programmable logic devices. Correspondingly, the development tool used is MaxplusⅡ programmable logic development software. Using MaxplusⅡ as an EDA software tool can achieve powerful logic functions, and also has the advantages of short cycle, high integration and reasonable price. Moreover, since the logic modules of the circuit are all implemented in FPGA, they have good portability and easy maintainability, and are convenient for future system improvements. At the same time, this further reduces the circuit board area and greatly improves the integration of the circuit. In this design, FPGA is mainly used to control and program various analog waveforms and generate various logics as control signals. The structural block diagram of the logic control in FPGA is shown in Figure 1, which can be divided into three parts, and the coarse sweep and fine sweep signals are used as control signals of sawtooth waves.


Figure 1 Functional block diagram of the control signal module in FPGA

The working process of FPGA is as follows: First, the input 32KHz clock signal is divided by the counter to generate a 1600Hz narrow pulse signal, which serves as the scanning trigger signal of the external analog waveform generation circuit on the one hand, and as the working start signal of the sawtooth wave control signal on the other hand, that is, every time the signal arrives, other functional modules are started to generate the required control signal according to the required timing. As shown in Figure 1, when the 1600Hz frequency arrives, the input clock (2MHz) of the fine scanning counter and the coarse scanning counter will be turned on, and the initial loading process of the two will be started. Then, the input pulse will be subtracted with this initial value. When the subtraction overflows, the output end will generate the required scanning signal. At the same time, the signal should be used to turn off the respective input clock signals until the next 1600Hz arrives. When the 8-bit initial value of the subtraction counter is changed through logical operation, the timing of the output signal will change accordingly relative to the 1600Hz signal. Through this logical method, the appearance time of various analog waveforms can be controlled, so that the display position of various waveforms on the oscilloscope can be controlled. Among them, the change of the initial value of the subtraction counter is realized through an 8-bit latch, that is, the DSP's address line, read/write signal line and I/O space access control line are logically operated as the selection signal of the 8-bit latch, and then the 8-bit data is written into the subtraction counter using the program.

The step wave control signal is completely realized by software program, that is, according to its various timings, different data are written into FPGA for latching at different times, and then output through D flip-flop to control the generation of signal. In order to meet the needs of the system, a logic to control the change of waveform width is also designed to generate pulse sequences of different widths required for display. Its operation method is to perform logical AND operation on two square wave signals of different frequencies and the output terminal D and D of a D flip-flop, and then perform logical OR operation, and then change the output state of the D flip-flop through the program, so as to obtain output pulses with two widths. [page]

4 Experimental Results

4.1 Step Waveform

Here, the specific process of generating the step wave waveform is briefly introduced. First, it is necessary to design an analog circuit that can generate 4 different DC voltages, so that it can output DC voltages of different amplitudes under different control signal combination states. The analog circuit has a total of 4 control signal input terminals, and the input of the combination is controlled by the DSP software program. When the combination state is "0001", the circuit will output a DC voltage with an amplitude of 4V, and when the combination state is "0010", the circuit will output a DC voltage with an amplitude of 5V. At the same time, the corresponding output position must be given. In this way, when the program loop changes the input combination state, in the dual-trace display mode, the step wave waveform shown in Figure 2 can be obtained. When this waveform is input to the x-axis of the oscilloscope, four bright spots will appear at the corresponding positions of the oscilloscope.


Figure 2 Step wave waveform

In actual engineering, the conversion between two different pulse widths is performed in FPGA through DSP program. The signal of the required pulse width is set to an appropriate width through an external monostable trigger, and then passed through the differential and integral circuits to form a waveform as shown in Figure 3. This waveform is input to the Y axis of the oscilloscope and set to the "XY" position, and finally four bright lines will be displayed. When the narrow pulse in Figure (a) is input to the Y axis, the program makes it stay at different amplitude points basically consistent, so that the corresponding bright lines will be more uniform; and when the wider pulse in Figure (b) is input to the Y axis, the program makes it stay at the highest amplitude point longer than at other amplitude points, which makes the top of the corresponding bright line brighter than the other parts of the bright line, and finally a bright line pattern similar to a match head will be displayed on the oscilloscope.


Figure 3 Two widths of pulse signal

4.2 Sawtooth Waveform

Similarly, a sawtooth waveform can be generated according to the concept of interleaving. As can be seen from the above, the FPGA will output a 1600Hz pulse as the trigger signal of the external analog circuit. Under its action, the analog circuit will generate a scanning signal with a length of 100us, which will be used as the input signal of the X-axis on the oscilloscope, and the 0V DC voltage will be input to the Y-axis. Then, according to the display principle of the oscilloscope, since the input of the Y-axis is 0V, the bright spot can only appear on the x-axis, and the input signal of the x-axis is a continuous signal with a fixed frequency value, so a waveform with a continuous deduction baseline on the x-axis will be displayed on the oscilloscope. Then, the analog circuit is controlled by the DSP software program to generate a continuously changing DC voltage value, and when it is output to the Y-axis of the oscilloscope, a sawtooth waveform can be obtained on the oscilloscope, as shown in Figure 4.


Figure 4 Sawtooth Waveform

5 Conclusion

Here, FPGA is used to form the core control circuit to generate the control signal of the analog waveform, and then the peripheral circuit is used to generate the sawtooth wave and the step wave. Through experimental observation, the generated waveform is clear and has no interference from noise. It shows that the analog circuit can handle the gradual signal well, which fully reflects the advantages of the analog circuit. Moreover, in actual engineering, the sawtooth wave and the step wave are reasonably used to generate various analog waveforms required by the project. As long as some of the circuits are slightly modified, they can be applied to other application systems.

Reference address:Realization of analog signal waveform based on FPGA

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