Implementation of TMS320C62x HPI boot process

　　1 Introduction

　　In the TMS320C62x series DSP, the host port HPI is a 16-bit width parallel port. The host (also called the host computer) takes control of the interface and can directly access the memory space of the CPU through it. In addition, the host can directly access the TMS320C62x on-chip memory-mapped peripherals.

　　The interconnection between HPI and CPU memory space is achieved through the DMA controller. With the help of special address and data registers, HPI access to the storage space is completed through the DMA auxiliary channel. Both the host and the CPU can access the HPI control register HPIC, and the host can also access the HPI address register HPIA and HPI data register HPID.

　　2 TMS320C62x boot mode

　　The TMS320C62x series DSP provides three boot methods: (1) No bootstrap process: the CPU starts executing code directly from address 0; (2) ROM bootstrap: the DMA/EDMA controller copies and fixes it from the ROM in the external CE1 space amount of a piece of code to address 0. After the copy is completed, the CPU starts running from address 0; (3) HPI bootstrapping: The external host initializes the memory space of the chip through HPI. After the initialization is completed, the external host wakes up the CPU through HPI interrupt. , the CPU starts running from address 0. All these settings are checked when the chip is reset. Once the reset signal is valid (reset=0), all three-state output pins return to their default states, and then the status of the setting pin BOOTMODE[4:0] is checked at the rising edge of the reset signal, and the bootstrap logic begins to take effect. Among them, C6201/C6701 has dedicated pins as BOOTMODE[4:0], C6211/C6711 uses the HD[4:0] of the host port, and C6202/C6203 uses the XD[4:0] of the expansion bus as BOOTMODE[4 :0] signal. The HPI boot mode process for TMS320C62x is as follows: First, the Boot mode needs to be set. The Boot mode settings are shown in Table 1. When the DSP is reset, if the HPI boot mode is selected, only the core of the DSP enters the reset state, and the other modules of the DSP remain active. In this way, the host can access the entire storage space of the DSP through the HPI interface, including on-chip, off-chip memory and on-chip peripheral registers, and initialize them. After the host completes the relevant settings for the DSP, it writes 1 to the DSPINT bit of the HPIC register to wake up the DSP from the reset state, and then the CPU starts executing the program from address 0. The operations that the host can perform on the DSP include: initializing the CPU and EMIF, loading programs and data to the DSP, etc.

　　Table 1 TMS320C62x HPI boot configuration BOOTMODE[4:0] Memory Map Memory at Address 0 Boot 00110 MAP 0 External; default values ​​HPI 00111 MAP 1 Internal HPI

　　3 Implementation of TMS320C62x HPI boot mode

　　3.1 Create startup code

　　The first step in implementing the TMS320C62x HPI boot mode is to generate the HPI boot DSP code and merge it with the main processor application so that the DSP application can be downloaded remotely together with the main processor application. In order to simplify, the following solution is adopted: convert the DSP application program into an array in the header file, and compile and connect it together with the main processor application program. The specific implementation is divided into two steps: 1) Use the conversion tool HEX6x to convert the COFF file into an ASCII-Hex format hexadecimal file; 2) Use the self-editing tool hex2aray.exe to convert the ASCII-Hex format file into a header containing an array document. (1) Use the conversion tool HEX6x to convert the COFF file into an ASCII-Hex format hexadecimal file. Use the conversion tool HEX6x to convert the COFF file into a hexadecimal file. Using the conversion tool HEX6x requires a .cmd file describing the specific conversion format. , as shown in the following file hexcom.cmd: HEX6x converts the COFF file test.out into two ASCII-Hex format files: one is a code segment, included in the file test.a00; the other is an initialized data segment, including In the file test.a10. Executing hex6x hexcom.cmd in the DOS command line will generate two files, test.a00 and test.a10. File hexcom.cmd: ..objecttest.out -a -byte -image -memwidth 16 -romwidth 16 -order M ROMS { /* Size of the internal pgm memory */ PGM: org = 0x00000000, length = 0x10000 /* Size of the internal data memory */ DATA: org = 0x80000000, length = 0x10000 } (2) Use the tool hex2aray.exe to generate a header file and then use hex2aray.exe to convert two ASCII-Hex format files: test.a00 and test.a10 respectively. Convert into two header files containing arrays: code.h and init.h. The tool hex2aray.exe is a self-edited tool. Executing the two commands hex2aray –i test.a00 –o code.h and hex2aray –i test.a10 –o init.h respectively in the DOS command line will generate two header files code.h and init.h. Options in the file hexcom.cmd: -a, instructs HEX6x to convert files in ASCII-Hex format. The ASCII-Hex file format is as follows: ^B $AXXXX, XX XX XX XX XX XX XX XX XX XX. . . ^ The C file starts with ASCII STX characters (ctrl-B, 02h) and ends with ASCII ETX characters (ctrl-C, 03h); $AXXXX represents the address; the rest are codes. The converted header file format is as follows: const char code[]={0x12,0x18,0x01,0x00,0x28,0x00,0x00,0x00,0x2A,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00 ,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x12, 0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00 0x00 ,0x00 ,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00, 0x00 ,0x00,0x00,0x00,0x12,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00 ,0x00,0x00,0x00, … };

　　3.2 Host operation on HPI interface

　　TMS320C62x provides three 16-bit registers: HPIC, HPIA, HPID and 16-bit data lines to communicate with the main processor. The main processor exchanges data with TMS320C62x through HPIC, HPIA, HPID and 16-bit data lines. The data exchange process is as follows: 1) First initialize HPIC; 2) Then write the address to HPIA; 3) Finally read or write through HPID data. Assuming that the host CPU is also TMS320C62x, the connection between the host and the target machine is as shown in Figure 1:

　　As shown in Figure 1, if /HCS of Target 6201 is connected to CE1 of host 6201. The HPI register of Target 6201 is mapped to the Host 6201DSP memory, and HCNTRL[1:0] and HHWIL are connected to the address lines of the host CPU. Then the address allocation of the HPIC, HPIA, and HPID registers is shown in Table 2. , then in C language, you can access HPIC, HPIA, and HPID through pointers, for example: #define C6201_HPI 0x01400000 /* Host address on which C6x HPI is mapped */ int *hpi_ptr; /* define and initialize pointer*/ hpi_ptr = ( int *)C6201_HPI; /* Write dest_address to HPIA, with HOB=1 */ ptr_hpi[2] = (int)(dest_address %26;amp; 0x0ffff); ptr_hpi[3] = (int)((dest_address>>16 )%26;amp;0x0ffff); Table 2 The address allocation of each register of HPIC, HPIA, and HPID is mapped to the address of the host HPI control line HPI register access HCNTL[1:0] HHWIL HPI Base address + 0x00 00 0 HPIC 1st halfword HPI Base address + 0x04 00 1 HPIC 2st halfword HPI Base address + 0x08 01 0 HPIA 1st halfword HPI Base address + 0x0C 01 1 HPIA 2st halfword HPI Base address + 0x10 10 0 HPID 1st halfword HPIA auto-increment HPI Base address + 0x14 10 1 HPID 2st halfword HPIA auto-increment HPI Base address + 0x18 11 0 HPID 1st halfword HPIA does not auto-increment HPI Base address + 0x1C 11 1 HPID 2st halfword HPIA does not auto-increment

　　3.3 The host downloads code and data segments to the target DSP through HPI

　　A program consists of two parts: an initialization area and a non-initialization area. The host processor must load these two areas to the correct address of the DSP according to the .cmd command file. The following code downloads the code segment and data segment to the specified address (ie, program RAM and data RAM) respectively. It mainly reads 32-bit long data from *source, and then writes this data to the dest_add address of the DSP (ie, program RAM and data RAM) through HPI. The data in *source is the data in the DSP startup code segment and data segment. void C6x_write_section(int *ptr_hpi, short *source, int dest_add, int length) { int i; /* Write HPIC with HWOB=1,1st halfword transferred is least significant */ /* HCNTRL1 HCNTRL0 HHWIL */ ptr_hpi[0] = 0x0001; /* 1st halfword 0 0 0 */ ptr_hpi[1] = 0x0001; /* 2nd halfword 0 0 1 */ /* Write destination address to HPIA, 1st halfword is least significant */ /* HCNTRL1 HCNTRL0 HHWIL */ ptr_hpi [2] = (int)(dest_add %26;amp; 0x0ffff); /* 0 1 0 */ ptr_hpi[3] = (int)((dest_add>>16)%26;amp;0x0ffff);/* 0 1 1 */ for(i=0; i < length; i++) { /* Write source_word to HPID with address post-increment */ /* 1st half-word transferred is least significant */ /* HCNTRL1 HCNTRL0 HHWIL */ ptr_hpi [4] = (int) *source++; /* 1 0 0 */ ptr_hpi[5] = (int) *source++; /* 1 0 1 */ } }

　　3.4 The target DSP starts executing the downloaded code

　　After the host downloads the code segment and data segment to the target DSP through HPI, the target DSP needs to execute the downloaded code. After the DSP exits the reset state by writing the DSPINT bit of the HPIC register to 1, the DSP begins executing the downloaded code from address 0. The specific implementation code is: /* Write HPIC with DSPINT=1 */ /* HCNTRL1 HCNTRL0 HHWIL */ /* 1st halfword 0 0 0 */ /* 2nd halfword 0 0 1 */ ptr_hpi[0] = 0x0002; /* 1st halfword */ ptr_hpi[1] = 0x0002; /* 2nd halfword */

　　4 Summary

　　According to the previous description, the TMS320C62x HPI startup process is shown in Figure 2.